]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
powerpc/405: move PPC405_ERR77 in asm-405.h
authorChristophe Leroy <christophe.leroy@c-s.fr>
Thu, 5 Jul 2018 16:24:55 +0000 (16:24 +0000)
committerMichael Ellerman <mpe@ellerman.id.au>
Mon, 30 Jul 2018 12:48:13 +0000 (22:48 +1000)
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/include/asm/asm-405.h [new file with mode: 0644]
arch/powerpc/include/asm/asm-compat.h
arch/powerpc/include/asm/atomic.h
arch/powerpc/include/asm/bitops.h
arch/powerpc/include/asm/book3s/32/pgtable.h
arch/powerpc/include/asm/cmpxchg.h
arch/powerpc/include/asm/futex.h
arch/powerpc/include/asm/nohash/32/pgtable.h
arch/powerpc/include/asm/spinlock.h
arch/powerpc/kernel/entry_32.S
arch/powerpc/kernel/head_40x.S

diff --git a/arch/powerpc/include/asm/asm-405.h b/arch/powerpc/include/asm/asm-405.h
new file mode 100644 (file)
index 0000000..7270d3a
--- /dev/null
@@ -0,0 +1,19 @@
+#ifndef _ASM_POWERPC_ASM_405_H
+#define _ASM_POWERPC_ASM_405_H
+
+#include <asm/asm-const.h>
+
+#ifdef __KERNEL__
+#ifdef CONFIG_IBM405_ERR77
+/* Erratum #77 on the 405 means we need a sync or dcbt before every
+ * stwcx.  The old ATOMIC_SYNC_FIX covered some but not all of this.
+ */
+#define PPC405_ERR77(ra,rb)    stringify_in_c(dcbt     ra, rb;)
+#define        PPC405_ERR77_SYNC       stringify_in_c(sync;)
+#else
+#define PPC405_ERR77(ra,rb)
+#define PPC405_ERR77_SYNC
+#endif
+#endif
+
+#endif /* _ASM_POWERPC_ASM_405_H */
index 7f2a7702596cd5a2a44c386431df1ad590acac86..d2cf3593e98783d723bf9acd7eab286b5d60c636 100644 (file)
 
 #endif
 
-#ifdef __KERNEL__
-#ifdef CONFIG_IBM405_ERR77
-/* Erratum #77 on the 405 means we need a sync or dcbt before every
- * stwcx.  The old ATOMIC_SYNC_FIX covered some but not all of this.
- */
-#define PPC405_ERR77(ra,rb)    stringify_in_c(dcbt     ra, rb;)
-#define        PPC405_ERR77_SYNC       stringify_in_c(sync;)
-#else
-#define PPC405_ERR77(ra,rb)
-#define PPC405_ERR77_SYNC
-#endif
-#endif
-
 #endif /* _ASM_POWERPC_ASM_COMPAT_H */
index 682b3e6a1e212d7ab0c38246ec7168ca7fbdf805..cbdb0b7e60a3988460ed6a877bd1a9a89c81e4b7 100644 (file)
@@ -10,6 +10,7 @@
 #include <linux/types.h>
 #include <asm/cmpxchg.h>
 #include <asm/barrier.h>
+#include <asm/asm-405.h>
 
 #define ATOMIC_INIT(i)         { (i) }
 
index b750ffef83c7dceae81fc90398a2db991a4477ff..ff71566dadee584c3878dd5c22bf162321d77e29 100644 (file)
@@ -45,6 +45,7 @@
 #include <linux/compiler.h>
 #include <asm/asm-compat.h>
 #include <asm/synch.h>
+#include <asm/asm-405.h>
 
 /* PPC bit number conversion */
 #define PPC_BITLSHIFT(be)      (BITS_PER_LONG - 1 - (be))
index 02f5acd7ccc4d4a954b72b7ea1d8792912bf557a..3c3e3424062878af33449c7423ac74d09e1aa687 100644 (file)
@@ -164,7 +164,6 @@ static inline unsigned long pte_update(pte_t *p,
 1:     lwarx   %0,0,%3\n\
        andc    %1,%0,%4\n\
        or      %1,%1,%5\n"
-       PPC405_ERR77(0,%3)
 "      stwcx.  %1,0,%3\n\
        bne-    1b"
        : "=&r" (old), "=&r" (tmp), "=m" (*p)
@@ -186,7 +185,6 @@ static inline unsigned long long pte_update(pte_t *p,
        lwzx    %0,0,%3\n\
        andc    %1,%L0,%5\n\
        or      %1,%1,%6\n"
-       PPC405_ERR77(0,%3)
 "      stwcx.  %1,0,%4\n\
        bne-    1b"
        : "=&r" (old), "=&r" (tmp), "=m" (*p)
index 9b001f1f6b32fcb650dd069989ac52959d92c817..67ec1073ac97d297e380b08333b3dab39b4d578a 100644 (file)
@@ -7,6 +7,7 @@
 #include <asm/synch.h>
 #include <asm/asm-compat.h>
 #include <linux/bug.h>
+#include <asm/asm-405.h>
 
 #ifdef __BIG_ENDIAN
 #define BITOFF_CAL(size, off)  ((sizeof(u32) - size - off) * BITS_PER_BYTE)
index 1a944c18c53902645d4621c6ced9b37a34e90c32..76c8648d0fa828ce550ff49030f66be7ac3dcb0c 100644 (file)
@@ -9,6 +9,7 @@
 #include <asm/errno.h>
 #include <asm/synch.h>
 #include <asm/asm-compat.h>
+#include <asm/asm-405.h>
 
 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
   __asm__ __volatile ( \
index 7c46a98cc7f4700d7361c8f4a5571bef9f1e3cfd..7df2f3a66cc5e0cb2831ba2caa0e927ebcfaf9ac 100644 (file)
@@ -9,6 +9,7 @@
 #include <linux/sched.h>
 #include <linux/threads.h>
 #include <asm/io.h>                    /* For sub-arch specific PPC_PIN_SIZE */
+#include <asm/asm-405.h>
 
 extern unsigned long ioremap_bot;
 
index 72dc4ddc2972a06539e41bf9bd51fb7c407b8049..7ec38f4ee927ba0566249c2ab456c72428ee2b7a 100644 (file)
@@ -27,6 +27,7 @@
 #include <asm/asm-compat.h>
 #include <asm/synch.h>
 #include <asm/ppc-opcode.h>
+#include <asm/asm-405.h>
 
 #ifdef CONFIG_PPC64
 /* use 0x800000yy when locked, where yy == CPU number */
index 973577f2141c26e5d4c857ba508e238e922b8b2b..7642cb984d3a119cb4f95142d0e30155283ab3eb 100644 (file)
@@ -33,6 +33,7 @@
 #include <asm/unistd.h>
 #include <asm/ptrace.h>
 #include <asm/export.h>
+#include <asm/asm-405.h>
 
 /*
  * MSR_KERNEL is > 0x10000 on 4xx/Book-E since it include MSR_CE.
index 41374a468d1c1d49a801f6d0856ced3908b29137..b19d784105118dff99297edd3b90d8e3f3120ef2 100644 (file)
@@ -42,6 +42,7 @@
 #include <asm/asm-offsets.h>
 #include <asm/ptrace.h>
 #include <asm/export.h>
+#include <asm/asm-405.h>
 
 /* As with the other PowerPC ports, it is expected that when code
  * execution begins here, the following registers contain valid, yet