drm/i915: Remove unused function intel_ddi_get_link_dpll()

The function intel_ddi_get_link_dpll() was added in f169660ed4e5
("drm/i915/dp: Add a standalone function to obtain shared dpll for
HSW/BDW/SKL/BXT") to "allow for the implementation of a platform
neutral upfront link training function", but such implementation
never landed.

So remove that function and clean up the exported shared DPLL interface.

Fixes: f169660ed4e5 ("drm/i915/dp: Add a standalone function to obtain shared dpll for HSW/BDW/SKL/BXT")
Cc: Durgadoss R <durgadoss.r@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Jim Bride <jim.bride@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1484310032-1863-1-git-send-email-ander.conselvan.de.oliveira@intel.com

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index b5b3065cb60c631ce14be4b180c0e4591dfe0a57..cd6fedd229a0d312d6f09f0c90ba62ef69f3448c 100644 (file)
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -2116,45 +2116,6 @@ intel_ddi_init_hdmi_connector(struct intel_digital_port *intel_dig_port)
        return connector;
 }
 
-struct intel_shared_dpll *
-intel_ddi_get_link_dpll(struct intel_dp *intel_dp, int clock)
-{
-       struct intel_connector *connector = intel_dp->attached_connector;
-       struct intel_encoder *encoder = connector->encoder;
-       struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-       struct intel_shared_dpll *pll = NULL;
-       struct intel_shared_dpll_state tmp_pll_state;
-       enum intel_dpll_id dpll_id;
-
-       if (IS_GEN9_LP(dev_priv)) {
-               dpll_id =  (enum intel_dpll_id)dig_port->port;
-               /*
-                * Select the required PLL. This works for platforms where
-                * there is no shared DPLL.
-                */
-               pll = &dev_priv->shared_dplls[dpll_id];
-               if (WARN_ON(pll->active_mask)) {
-
-                       DRM_ERROR("Shared DPLL in use. active_mask:%x\n",
-                                 pll->active_mask);
-                       return NULL;
-               }
-               tmp_pll_state = pll->state;
-               if (!bxt_ddi_dp_set_dpll_hw_state(clock,
-                                                 &pll->state.hw_state)) {
-                       DRM_ERROR("Could not setup DPLL\n");
-                       pll->state = tmp_pll_state;
-                       return NULL;
-               }
-       } else if (IS_GEN9_BC(dev_priv)) {
-               pll = skl_find_link_pll(dev_priv, clock);
-       } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
-               pll = hsw_ddi_dp_get_dpll(encoder, clock);
-       }
-       return pll;
-}
-
 void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
 {
        struct intel_digital_port *intel_dig_port;

diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 79f656ca593daa9b7aef44c2830d5961ad5cda16..b4de632f11587000778908a74969fd34f89fdfe1 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -42,44 +42,6 @@
  * commit phase.
  */
 
-struct intel_shared_dpll *
-skl_find_link_pll(struct drm_i915_private *dev_priv, int clock)
-{
-       struct intel_shared_dpll *pll = NULL;
-       struct intel_dpll_hw_state dpll_hw_state;
-       enum intel_dpll_id i;
-       bool found = false;
-
-       if (!skl_ddi_dp_set_dpll_hw_state(clock, &dpll_hw_state))
-               return pll;
-
-       for (i = DPLL_ID_SKL_DPLL1; i <= DPLL_ID_SKL_DPLL3; i++) {
-               pll = &dev_priv->shared_dplls[i];
-
-               /* Only want to check enabled timings first */
-               if (pll->state.crtc_mask == 0)
-                       continue;
-
-               if (memcmp(&dpll_hw_state, &pll->state.hw_state,
-                          sizeof(pll->state.hw_state)) == 0) {
-                       found = true;
-                       break;
-               }
-       }
-
-       /* Ok no matching timings, maybe there's a free one? */
-       for (i = DPLL_ID_SKL_DPLL1;
-            ((found == false) && (i <= DPLL_ID_SKL_DPLL3)); i++) {
-               pll = &dev_priv->shared_dplls[i];
-               if (pll->state.crtc_mask == 0) {
-                       pll->state.hw_state = dpll_hw_state;
-                       break;
-               }
-       }
-
-       return pll;
-}
-
 static void
 intel_atomic_duplicate_dpll_state(struct drm_i915_private *dev_priv,
                                  struct intel_shared_dpll_state *shared_dpll)
@@ -811,8 +773,8 @@ static struct intel_shared_dpll *hsw_ddi_hdmi_get_dpll(int clock,
        return pll;
 }
 
-struct intel_shared_dpll *hsw_ddi_dp_get_dpll(struct intel_encoder *encoder,
-                                             int clock)
+static struct intel_shared_dpll *
+hsw_ddi_dp_get_dpll(struct intel_encoder *encoder, int clock)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
        struct intel_shared_dpll *pll;
@@ -1360,8 +1322,9 @@ static bool skl_ddi_hdmi_pll_dividers(struct intel_crtc *crtc,
 }
 
 
-bool skl_ddi_dp_set_dpll_hw_state(int clock,
-                                 struct intel_dpll_hw_state *dpll_hw_state)
+static bool
+skl_ddi_dp_set_dpll_hw_state(int clock,
+                            struct intel_dpll_hw_state *dpll_hw_state)
 {
        uint32_t ctrl1;
 
@@ -1816,8 +1779,9 @@ static bool bxt_ddi_set_dpll_hw_state(int clock,
        return true;
 }
 
-bool bxt_ddi_dp_set_dpll_hw_state(int clock,
-                         struct intel_dpll_hw_state *dpll_hw_state)
+static bool
+bxt_ddi_dp_set_dpll_hw_state(int clock,
+                            struct intel_dpll_hw_state *dpll_hw_state)
 {
        struct bxt_clk_div clk_div = {0};
 

diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h b/drivers/gpu/drm/i915/intel_dpll_mgr.h
index af1497eb4f9cc5fa4e89bf83dab0b1247e775ee7..f8d13a947c13e1c98361c8cabdb0b4fdb19c7329 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h
@@ -282,20 +282,4 @@ void intel_shared_dpll_init(struct drm_device *dev);
 void intel_dpll_dump_hw_state(struct drm_i915_private *dev_priv,
                              struct intel_dpll_hw_state *hw_state);
 
-/* BXT dpll related functions */
-bool bxt_ddi_dp_set_dpll_hw_state(int clock,
-                         struct intel_dpll_hw_state *dpll_hw_state);
-
-
-/* SKL dpll related functions */
-bool skl_ddi_dp_set_dpll_hw_state(int clock,
-                                 struct intel_dpll_hw_state *dpll_hw_state);
-struct intel_shared_dpll *skl_find_link_pll(struct drm_i915_private *dev_priv,
-                                           int clock);
-
-
-/* HSW dpll related functions */
-struct intel_shared_dpll *hsw_ddi_dp_get_dpll(struct intel_encoder *encoder,
-                                             int clock);
-
 #endif /* _INTEL_DPLL_MGR_H_ */

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 1298aad7d8320f7efdce5d466a63ca757e074a6b..7845d40f203e68005ce916067d1e4667bf46dbd5 100644 (file)
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1232,8 +1232,6 @@ void intel_ddi_clock_get(struct intel_encoder *encoder,
                         struct intel_crtc_state *pipe_config);
 void intel_ddi_set_vc_payload_alloc(struct drm_crtc *crtc, bool state);
 uint32_t ddi_signal_levels(struct intel_dp *intel_dp);
-struct intel_shared_dpll *intel_ddi_get_link_dpll(struct intel_dp *intel_dp,
-                                                 int clock);
 unsigned int intel_fb_align_height(struct drm_device *dev,
                                   unsigned int height,
                                   uint32_t pixel_format,