]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/i915/selftest: Refactor reset locking
authorChris Wilson <chris@chris-wilson.co.uk>
Fri, 21 Jul 2017 12:32:35 +0000 (13:32 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 27 Jul 2017 07:38:57 +0000 (09:38 +0200)
Extract the common barrier against rogue hangchecks from disrupting our
direct testing of resets, and in the process expand the lock to include
the per-engine reset shortcuts.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170721123238.16428-17-chris@chris-wilson.co.uk
Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/selftests/intel_hangcheck.c

index cf589e3c7106e0252de8fe22161d84e86d947b4b..d4265ef21875275fd1dff51f0e1820dc7ff38139 100644 (file)
@@ -297,6 +297,37 @@ static int igt_hang_sanitycheck(void *arg)
        return err;
 }
 
+static void global_reset_lock(struct drm_i915_private *i915)
+{
+       struct intel_engine_cs *engine;
+       enum intel_engine_id id;
+
+       while (test_and_set_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags))
+               wait_event(i915->gpu_error.reset_queue,
+                          !test_bit(I915_RESET_BACKOFF,
+                                    &i915->gpu_error.flags));
+
+       for_each_engine(engine, i915, id) {
+               while (test_and_set_bit(I915_RESET_ENGINE + id,
+                                       &i915->gpu_error.flags))
+                       wait_on_bit(&i915->gpu_error.flags,
+                                   I915_RESET_ENGINE + id,
+                                   TASK_UNINTERRUPTIBLE);
+       }
+}
+
+static void global_reset_unlock(struct drm_i915_private *i915)
+{
+       struct intel_engine_cs *engine;
+       enum intel_engine_id id;
+
+       for_each_engine(engine, i915, id)
+               clear_bit(I915_RESET_ENGINE + id, &i915->gpu_error.flags);
+
+       clear_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
+       wake_up_all(&i915->gpu_error.reset_queue);
+}
+
 static int igt_global_reset(void *arg)
 {
        struct drm_i915_private *i915 = arg;
@@ -305,7 +336,7 @@ static int igt_global_reset(void *arg)
 
        /* Check that we can issue a global GPU reset */
 
-       set_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
+       global_reset_lock(i915);
        set_bit(I915_RESET_HANDOFF, &i915->gpu_error.flags);
 
        mutex_lock(&i915->drm.struct_mutex);
@@ -320,8 +351,7 @@ static int igt_global_reset(void *arg)
        mutex_unlock(&i915->drm.struct_mutex);
 
        GEM_BUG_ON(test_bit(I915_RESET_HANDOFF, &i915->gpu_error.flags));
-       clear_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
-       wake_up_all(&i915->gpu_error.reset_queue);
+       global_reset_unlock(i915);
 
        if (i915_terminally_wedged(&i915->gpu_error))
                err = -EIO;
@@ -571,7 +601,7 @@ static int igt_wait_reset(void *arg)
 
        /* Check that we detect a stuck waiter and issue a reset */
 
-       set_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
+       global_reset_lock(i915);
 
        mutex_lock(&i915->drm.struct_mutex);
        err = hang_init(&h, i915);
@@ -616,8 +646,7 @@ static int igt_wait_reset(void *arg)
        hang_fini(&h);
 unlock:
        mutex_unlock(&i915->drm.struct_mutex);
-       clear_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
-       wake_up_all(&i915->gpu_error.reset_queue);
+       global_reset_unlock(i915);
 
        if (i915_terminally_wedged(&i915->gpu_error))
                return -EIO;
@@ -638,7 +667,8 @@ static int igt_reset_queue(void *arg)
        if (!igt_can_mi_store_dword_imm(i915))
                return 0;
 
-       set_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
+       global_reset_lock(i915);
+
        mutex_lock(&i915->drm.struct_mutex);
        err = hang_init(&h, i915);
        if (err)
@@ -732,8 +762,7 @@ static int igt_reset_queue(void *arg)
        hang_fini(&h);
 unlock:
        mutex_unlock(&i915->drm.struct_mutex);
-       clear_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
-       wake_up_all(&i915->gpu_error.reset_queue);
+       global_reset_unlock(i915);
 
        if (i915_terminally_wedged(&i915->gpu_error))
                return -EIO;
@@ -755,7 +784,8 @@ static int igt_render_engine_reset_fallback(void *arg)
        if (!intel_has_reset_engine(i915))
                return 0;
 
-       set_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
+       global_reset_lock(i915);
+
        mutex_lock(&i915->drm.struct_mutex);
 
        err = hang_init(&h, i915);
@@ -785,8 +815,7 @@ static int igt_render_engine_reset_fallback(void *arg)
 
        /* unlock since we'll call handle_error */
        mutex_unlock(&i915->drm.struct_mutex);
-       clear_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
-       wake_up_all(&i915->gpu_error.reset_queue);
+       global_reset_unlock(i915);
 
        i915_handle_error(i915, intel_engine_flag(engine), "live test");
 
@@ -808,7 +837,7 @@ static int igt_render_engine_reset_fallback(void *arg)
         * more full reset to re-enable the hw.
         */
        if (i915_terminally_wedged(&i915->gpu_error)) {
-               set_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
+               global_reset_lock(i915);
                rq->fence.error = 0;
 
                mutex_lock(&i915->drm.struct_mutex);
@@ -829,8 +858,7 @@ static int igt_render_engine_reset_fallback(void *arg)
        i915_gem_request_put(rq);
        hang_fini(&h);
 out_backoff:
-       clear_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
-       wake_up_all(&i915->gpu_error.reset_queue);
+       global_reset_unlock(i915);
 
        if (i915_terminally_wedged(&i915->gpu_error))
                return -EIO;