ARM: dts: r8a7743: Remove unit-address and reg from integrated cache

The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.

Fixes: 34e8d993a68ae459 ("ARM: dts: r8a7743: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index c166be2f18e053be118b541333ccc1bd7834e7e1..cd908796fb3b7c186a5b5056f13d72802acfbeb0 100644 (file)
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -32,9 +32,8 @@ cpu0: cpu@0 {
                        next-level-cache = <&L2_CA15>;
                };
 
-               L2_CA15: cache-controller@0 {
+               L2_CA15: cache-controller-0 {
                        compatible = "cache";
-                       reg = <0>;
                        cache-unified;
                        cache-level = <2>;
                        power-domains = <&sysc R8A7743_PD_CA15_SCU>;