]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: renesas: r8a7796: Add IPMMU device nodes
authorMagnus Damm <damm+renesas@opensource.se>
Fri, 10 Nov 2017 13:26:06 +0000 (14:26 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 28 Nov 2017 08:36:13 +0000 (09:36 +0100)
Add r8a7796 IPMMU nodes and keep all disabled by default.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r8a7796.dtsi

index 8c94a313d9e17d9f3f4655270c1e68bddabbb742..9e760410821521eae5d04ca0f96063f6b7658725 100644 (file)
@@ -357,6 +357,106 @@ pmu_a53 {
                                             <&a53_3>;
                };
 
+               ipmmu_vi0: mmu@febd0000 {
+                       compatible = "renesas,ipmmu-r8a7796";
+                       reg = <0 0xfebd0000 0 0x1000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 9>;
+                       power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+                       status = "disabled";
+               };
+
+               ipmmu_vc0: mmu@fe6b0000 {
+                       compatible = "renesas,ipmmu-r8a7796";
+                       reg = <0 0xfe6b0000 0 0x1000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 8>;
+                       power-domains = <&sysc R8A7796_PD_A3VC>;
+                       #iommu-cells = <1>;
+                       status = "disabled";
+               };
+
+               ipmmu_pv0: mmu@fd800000 {
+                       compatible = "renesas,ipmmu-r8a7796";
+                       reg = <0 0xfd800000 0 0x1000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 5>;
+                       power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+                       status = "disabled";
+               };
+
+               ipmmu_pv1: mmu@fd950000 {
+                       compatible = "renesas,ipmmu-r8a7796";
+                       reg = <0 0xfd950000 0 0x1000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 6>;
+                       power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+                       status = "disabled";
+               };
+
+               ipmmu_ir: mmu@ff8b0000 {
+                       compatible = "renesas,ipmmu-r8a7796";
+                       reg = <0 0xff8b0000 0 0x1000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 3>;
+                       power-domains = <&sysc R8A7796_PD_A3IR>;
+                       #iommu-cells = <1>;
+                       status = "disabled";
+               };
+
+               ipmmu_hc: mmu@e6570000 {
+                       compatible = "renesas,ipmmu-r8a7796";
+                       reg = <0 0xe6570000 0 0x1000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 2>;
+                       power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+                       status = "disabled";
+               };
+
+               ipmmu_rt: mmu@ffc80000 {
+                       compatible = "renesas,ipmmu-r8a7796";
+                       reg = <0 0xffc80000 0 0x1000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 7>;
+                       power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+                       status = "disabled";
+               };
+
+               ipmmu_mp: mmu@ec670000 {
+                       compatible = "renesas,ipmmu-r8a7796";
+                       reg = <0 0xec670000 0 0x1000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 4>;
+                       power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+                       status = "disabled";
+               };
+
+               ipmmu_ds0: mmu@e6740000 {
+                       compatible = "renesas,ipmmu-r8a7796";
+                       reg = <0 0xe6740000 0 0x1000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 0>;
+                       power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+                       status = "disabled";
+               };
+
+               ipmmu_ds1: mmu@e7740000 {
+                       compatible = "renesas,ipmmu-r8a7796";
+                       reg = <0 0xe7740000 0 0x1000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 1>;
+                       power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+                       status = "disabled";
+               };
+
+               ipmmu_mm: mmu@e67b0000 {
+                       compatible = "renesas,ipmmu-r8a7796";
+                       reg = <0 0xe67b0000 0 0x1000>;
+                       interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+                       power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+                       status = "disabled";
+               };
+
                cpg: clock-controller@e6150000 {
                        compatible = "renesas,r8a7796-cpg-mssr";
                        reg = <0 0xe6150000 0 0x1000>;