]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM64: dts: marvell: armada-37xx: Wire PMUv3
authorMarc Zyngier <marc.zyngier@arm.com>
Sat, 1 Jul 2017 14:16:36 +0000 (15:16 +0100)
committerGregory CLEMENT <gregory.clement@free-electrons.com>
Wed, 2 Aug 2017 14:07:38 +0000 (16:07 +0200)
The Cortex-A53s that power the Armada-37xx SoCs are equipped with
a PMUv3, just like most ARMv8 cores.

Advertise the PMUv3 presence in the device tree, and wire its
interrupt. This allows the perf subsystem to work correctly.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
arch/arm64/boot/dts/marvell/armada-37xx.dtsi

index b6f1e7a5e5ec0f9e00689f780d8d15378566573c..8c0cf7efac65242a50a8ac2b201f351c8c0ce2a6 100644 (file)
@@ -81,6 +81,11 @@ timer {
                             <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
        };
 
+       pmu {
+               compatible = "arm,armv8-pmuv3";
+               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
+       };
+
        soc {
                compatible = "simple-bus";
                #address-cells = <2>;