]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
tg3: Add higher cpu clock for 5762.
authorSanjeev Bansal <sanjeevb.bansal@broadcom.com>
Mon, 16 Jul 2018 05:43:32 +0000 (11:13 +0530)
committerDavid S. Miller <davem@davemloft.net>
Mon, 16 Jul 2018 21:42:11 +0000 (14:42 -0700)
This patch has fix for TX timeout while running bi-directional
traffic with 100 Mbps using 5762.

Signed-off-by: Sanjeev Bansal <sanjeevb.bansal@broadcom.com>
Signed-off-by: Siva Reddy Kallam <siva.kallam@broadcom.com>
Reviewed-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/broadcom/tg3.c

index 2ee15273ae29eb487660ca07a82c14129624283d..aa1374d0af9313dfdbf6a7f8dfeea92e2fee7013 100644 (file)
@@ -9294,6 +9294,15 @@ static int tg3_chip_reset(struct tg3 *tp)
 
        tg3_restore_clk(tp);
 
+       /* Increase the core clock speed to fix tx timeout issue for 5762
+        * with 100Mbps link speed.
+        */
+       if (tg3_asic_rev(tp) == ASIC_REV_5762) {
+               val = tr32(TG3_CPMU_CLCK_ORIDE_ENABLE);
+               tw32(TG3_CPMU_CLCK_ORIDE_ENABLE, val |
+                    TG3_CPMU_MAC_ORIDE_ENABLE);
+       }
+
        /* Reprobe ASF enable state.  */
        tg3_flag_clear(tp, ENABLE_ASF);
        tp->phy_flags &= ~(TG3_PHYFLG_1G_ON_VAUX_OK |