media: cedrus: Properly signal size in mode register

Mode register also holds information if video width is bigger than 2048
and if it is equal to 4096.

Rework cedrus_engine_enable() to properly signal this properties.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>

diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
index 74e4c5e3894e79301a3e0a1e8491f48679bd9727..8a09a08b1af227dce0c713e84a4c7e9ba843aee7 100644 (file)
--- a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
@@ -485,7 +485,7 @@ static void cedrus_h264_setup(struct cedrus_ctx *ctx,
 {
        struct cedrus_dev *dev = ctx->dev;
 
-       cedrus_engine_enable(dev, CEDRUS_CODEC_H264);
+       cedrus_engine_enable(ctx, CEDRUS_CODEC_H264);
 
        cedrus_write(dev, VE_H264_SDROT_CTRL, 0);
        cedrus_write(dev, VE_H264_EXTRA_BUFFER1,

diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
index 9bc921866f70e399551bc6bd5e2d9b1f35f60954..6945dc74e1d759abe208059bac98b8be5b019975 100644 (file)
--- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
@@ -276,7 +276,7 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx,
        }
 
        /* Activate H265 engine. */
-       cedrus_engine_enable(dev, CEDRUS_CODEC_H265);
+       cedrus_engine_enable(ctx, CEDRUS_CODEC_H265);
 
        /* Source offset and length in bits. */
 

diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c
index 93347d3ba360aecd5446543da38debe2515518da..daf5f244f93b00a7f5822cfcec3fb08bd4163ba2 100644 (file)
--- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c
@@ -30,7 +30,7 @@
 #include "cedrus_hw.h"
 #include "cedrus_regs.h"
 
-int cedrus_engine_enable(struct cedrus_dev *dev, enum cedrus_codec codec)
+int cedrus_engine_enable(struct cedrus_ctx *ctx, enum cedrus_codec codec)
 {
        u32 reg = 0;
 
@@ -58,7 +58,12 @@ int cedrus_engine_enable(struct cedrus_dev *dev, enum cedrus_codec codec)
                return -EINVAL;
        }
 
-       cedrus_write(dev, VE_MODE, reg);
+       if (ctx->src_fmt.width == 4096)
+               reg |= VE_MODE_PIC_WIDTH_IS_4096;
+       if (ctx->src_fmt.width > 2048)
+               reg |= VE_MODE_PIC_WIDTH_MORE_2048;
+
+       cedrus_write(ctx->dev, VE_MODE, reg);
 
        return 0;
 }

diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.h b/drivers/staging/media/sunxi/cedrus/cedrus_hw.h
index 27d0882397aaf07ce22b33305cc087c901452426..604ff932fbf526345a762b219357dbf29e11c8b7 100644 (file)
--- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.h
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.h
@@ -16,7 +16,7 @@
 #ifndef _CEDRUS_HW_H_
 #define _CEDRUS_HW_H_
 
-int cedrus_engine_enable(struct cedrus_dev *dev, enum cedrus_codec codec);
+int cedrus_engine_enable(struct cedrus_ctx *ctx, enum cedrus_codec codec);
 void cedrus_engine_disable(struct cedrus_dev *dev);
 
 void cedrus_dst_format_set(struct cedrus_dev *dev,

diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c b/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c
index 13c34927bad5395216c088217a12b8b067576dd5..8bcd6b8f9e2db436d4b695df733d9c00bf2693d1 100644 (file)
--- a/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c
@@ -96,7 +96,7 @@ static void cedrus_mpeg2_setup(struct cedrus_ctx *ctx, struct cedrus_run *run)
        quantization = run->mpeg2.quantization;
 
        /* Activate MPEG engine. */
-       cedrus_engine_enable(dev, CEDRUS_CODEC_MPEG2);
+       cedrus_engine_enable(ctx, CEDRUS_CODEC_MPEG2);
 
        /* Set intra quantization matrix. */
 

diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h
index 4275a307d2827a885ff53dad9edc58256696e7e9..ace3d49fcd82c6505ac9f21672ca0b99cdf22385 100644 (file)
--- a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h
@@ -35,6 +35,8 @@
 
 #define VE_MODE                                        0x00
 
+#define VE_MODE_PIC_WIDTH_IS_4096              BIT(22)
+#define VE_MODE_PIC_WIDTH_MORE_2048            BIT(21)
 #define VE_MODE_REC_WR_MODE_2MB                        (0x01 << 20)
 #define VE_MODE_REC_WR_MODE_1MB                        (0x00 << 20)
 #define VE_MODE_DDR_MODE_BW_128                        (0x03 << 16)