MIPS: Remove unused R6000 support

The kernel contains a small amount of incomplete code aimed at
supporting old R6000 CPUs. This is:

  - Unused, as no machine selects CONFIG_SYS_HAS_CPU_R6000.

  - Broken, since there are glaring errors such as r6000_fpu.S moving
    the FCSR register to t1, then ignoring it & instead saving t0 into
    struct sigcontext...

  - A maintenance headache, since it's code that nobody can test which
    nevertheless imposes constraints on code which it shares with other
    machines.

Remove this incomplete & broken R6000 CPU support in order to clean up
and in preparation for changes which will no longer need to consider
dragging the pretense of R6000 support along with them.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16236/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 48d91d5be4e9b6cf56c1cd0849830e2708967aa2..a2f6b199776a8ee540244af665b12e87ac728407 100644 (file)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1627,14 +1627,6 @@ config CPU_R5500
          NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
          instruction set.
 
-config CPU_R6000
-       bool "R6000"
-       depends on SYS_HAS_CPU_R6000
-       select CPU_SUPPORTS_32BIT_KERNEL
-       help
-         MIPS Technologies R6000 and R6000A series processors.  Note these
-         processors are extremely rare and the support for them is incomplete.
-
 config CPU_NEVADA
        bool "RM52xx"
        depends on SYS_HAS_CPU_NEVADA
@@ -1950,9 +1942,6 @@ config SYS_HAS_CPU_R5432
 config SYS_HAS_CPU_R5500
        bool
 
-config SYS_HAS_CPU_R6000
-       bool
-
 config SYS_HAS_CPU_NEVADA
        bool
 
@@ -2180,7 +2169,7 @@ config PAGE_SIZE_32KB
 
 config PAGE_SIZE_64KB
        bool "64kB"
-       depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000
+       depends on !CPU_R3000 && !CPU_TX39XX
        help
          Using 64kB page size will result in higher performance kernel at
          the price of higher memory consumption.  This option is available on
@@ -2248,11 +2237,11 @@ config CPU_HAS_PREFETCH
 
 config CPU_GENERIC_DUMP_TLB
        bool
-       default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
+       default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX)
 
 config CPU_R4K_FPU
        bool
-       default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
+       default y if !(CPU_R3000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
 
 config CPU_R4K_CACHE_TLB
        bool

diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index bc2708c9ada40cf4206cd228d84a6ebf634161b3..d78d615cd395cfb4a245a097c2a202202c806bb4 100644 (file)
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -151,7 +151,6 @@ cflags-y += -fno-stack-check
 #
 cflags-$(CONFIG_CPU_R3000)     += -march=r3000
 cflags-$(CONFIG_CPU_TX39XX)    += -march=r3900
-cflags-$(CONFIG_CPU_R6000)     += -march=r6000 -Wa,--trap
 cflags-$(CONFIG_CPU_R4300)     += -march=r4300 -Wa,--trap
 cflags-$(CONFIG_CPU_VR41XX)    += -march=r4100 -Wa,--trap
 cflags-$(CONFIG_CPU_R4X00)     += -march=r4600 -Wa,--trap

diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h
index 175fe565f4e1e6e078ead8d42da079cb779d7340..a45af3de075d900cf819071c390820c7f749f47b 100644 (file)
--- a/arch/mips/include/asm/cpu-type.h
+++ b/arch/mips/include/asm/cpu-type.h
@@ -151,11 +151,6 @@ static inline int __pure __get_cpu_type(const int cpu_type)
        case CPU_R5500:
 #endif
 
-#ifdef CONFIG_SYS_HAS_CPU_R6000
-       case CPU_R6000:
-       case CPU_R6000A:
-#endif
-
 #ifdef CONFIG_SYS_HAS_CPU_NEVADA
        case CPU_NEVADA:
 #endif

diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index d0c152b989f8eea1f6d8380386f7997483329f70..ece9b84f3bcbd78511903c97269795dddd8f111d 100644 (file)
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -285,11 +285,6 @@ enum cpu_type_enum {
        CPU_R2000, CPU_R3000, CPU_R3000A, CPU_R3041, CPU_R3051, CPU_R3052,
        CPU_R3081, CPU_R3081E,
 
-       /*
-        * R6000 class processors
-        */
-       CPU_R6000, CPU_R6000A,
-
        /*
         * R4000 class processors
         */

diff --git a/arch/mips/include/asm/module.h b/arch/mips/include/asm/module.h
index e51add184717f4283ba68b5cc3e446af364e1b2e..06552a965cf4b1c9f848cf831e11d424145439e0 100644 (file)
--- a/arch/mips/include/asm/module.h
+++ b/arch/mips/include/asm/module.h
@@ -114,8 +114,6 @@ search_module_dbetables(unsigned long addr)
 #define MODULE_PROC_FAMILY "R5432 "
 #elif defined CONFIG_CPU_R5500
 #define MODULE_PROC_FAMILY "R5500 "
-#elif defined CONFIG_CPU_R6000
-#define MODULE_PROC_FAMILY "R6000 "
 #elif defined CONFIG_CPU_NEVADA
 #define MODULE_PROC_FAMILY "NEVADA "
 #elif defined CONFIG_CPU_R8000

diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 46c0581256f1d7d226b7b49f2968966d4d39ed49..afd66b2d9cf3b6204867178e16b2ade35d26d4fa 100644 (file)
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -37,7 +37,6 @@ obj-$(CONFIG_FUNCTION_TRACER) += mcount.o ftrace.o
 
 obj-$(CONFIG_CPU_R4K_FPU)      += r4k_fpu.o r4k_switch.o
 obj-$(CONFIG_CPU_R3000)                += r2300_fpu.o r2300_switch.o
-obj-$(CONFIG_CPU_R6000)                += r6000_fpu.o r4k_switch.o
 obj-$(CONFIG_CPU_TX39XX)       += r2300_fpu.o r2300_switch.o
 obj-$(CONFIG_CPU_CAVIUM_OCTEON)        += r4k_fpu.o octeon_switch.o
 

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index d08afc7dc5072db9c55d4ca056a4422c03ab927e..19ae0e279c86fc8262023b97fc8d3abd0ead5780 100644 (file)
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1394,24 +1394,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
                             MIPS_CPU_DIVEC | MIPS_CPU_LLSC;
                c->tlbsize = 48;
                break;
-       case PRID_IMP_R6000:
-               c->cputype = CPU_R6000;
-               __cpu_name[cpu] = "R6000";
-               set_isa(c, MIPS_CPU_ISA_II);
-               c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS;
-               c->options = MIPS_CPU_TLB | MIPS_CPU_FPU |
-                            MIPS_CPU_LLSC;
-               c->tlbsize = 32;
-               break;
-       case PRID_IMP_R6000A:
-               c->cputype = CPU_R6000A;
-               __cpu_name[cpu] = "R6000A";
-               set_isa(c, MIPS_CPU_ISA_II);
-               c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS;
-               c->options = MIPS_CPU_TLB | MIPS_CPU_FPU |
-                            MIPS_CPU_LLSC;
-               c->tlbsize = 32;
-               break;
        case PRID_IMP_RM7000:
                c->cputype = CPU_RM7000;
                __cpu_name[cpu] = "RM7000";

diff --git a/arch/mips/kernel/r6000_fpu.S b/arch/mips/kernel/r6000_fpu.S
deleted file mode 100644 (file)
index 9cc7bfa..0000000
--- a/arch/mips/kernel/r6000_fpu.S
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * r6000_fpu.S: Save/restore floating point context for signal handlers.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996 by Ralf Baechle
- *
- * Multi-arch abstraction and asm macros for easier reading:
- * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
- */
-#include <asm/asm.h>
-#include <asm/fpregdef.h>
-#include <asm/mipsregs.h>
-#include <asm/asm-offsets.h>
-#include <asm/regdef.h>
-
-       .set    noreorder
-       .set    mips2
-       .set    push
-       SET_HARDFLOAT
-
-/**
- * _save_fp_context() - save FP context from the FPU
- * @a0 - pointer to fpregs field of sigcontext
- * @a1 - pointer to fpc_csr field of sigcontext
- *
- * Save FP context, including the 32 FP data registers and the FP
- * control & status register, from the FPU to signal context.
- */
-       LEAF(_save_fp_context)
-       mfc0    t0,CP0_STATUS
-       sll     t0,t0,2
-       bgez    t0,1f
-        nop
-
-       cfc1    t1,fcr31
-       /* Store the 16 double precision registers */
-       sdc1    $f0,0(a0)
-       sdc1    $f2,16(a0)
-       sdc1    $f4,32(a0)
-       sdc1    $f6,48(a0)
-       sdc1    $f8,64(a0)
-       sdc1    $f10,80(a0)
-       sdc1    $f12,96(a0)
-       sdc1    $f14,112(a0)
-       sdc1    $f16,128(a0)
-       sdc1    $f18,144(a0)
-       sdc1    $f20,160(a0)
-       sdc1    $f22,176(a0)
-       sdc1    $f24,192(a0)
-       sdc1    $f26,208(a0)
-       sdc1    $f28,224(a0)
-       sdc1    $f30,240(a0)
-       jr      ra
-        sw     t0,(a1)
-1:     jr      ra
-        nop
-       END(_save_fp_context)
-
-/**
- * _restore_fp_context() - restore FP context to the FPU
- * @a0 - pointer to fpregs field of sigcontext
- * @a1 - pointer to fpc_csr field of sigcontext
- *
- * Restore FP context, including the 32 FP data registers and the FP
- * control & status register, from signal context to the FPU.
- */
-       LEAF(_restore_fp_context)
-       mfc0    t0,CP0_STATUS
-       sll     t0,t0,2
-
-       bgez    t0,1f
-        lw     t0,(a1)
-       /* Restore the 16 double precision registers */
-       ldc1    $f0,0(a0)
-       ldc1    $f2,16(a0)
-       ldc1    $f4,32(a0)
-       ldc1    $f6,48(a0)
-       ldc1    $f8,64(a0)
-       ldc1    $f10,80(a0)
-       ldc1    $f12,96(a0)
-       ldc1    $f14,112(a0)
-       ldc1    $f16,128(a0)
-       ldc1    $f18,144(a0)
-       ldc1    $f20,160(a0)
-       ldc1    $f22,176(a0)
-       ldc1    $f24,192(a0)
-       ldc1    $f26,208(a0)
-       ldc1    $f28,224(a0)
-       ldc1    $f30,240(a0)
-       jr      ra
-        ctc1   t0,fcr31
-1:     jr      ra
-        nop
-       END(_restore_fp_context)
-
-       .set pop        /* SET_HARDFLOAT */

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index b68b4d0726d3e02fd7888fd5d757e14c2c8fc4b9..b52a785477f918d2e64de0f3d57abe4e03a16532 100644 (file)
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -2428,21 +2428,6 @@ void __init trap_init(void)
        set_except_vector(EXCCODE_TR, handle_tr);
        set_except_vector(EXCCODE_MSAFPE, handle_msa_fpe);
 
-       if (current_cpu_type() == CPU_R6000 ||
-           current_cpu_type() == CPU_R6000A) {
-               /*
-                * The R6000 is the only R-series CPU that features a machine
-                * check exception (similar to the R4000 cache error) and
-                * unaligned ldc1/sdc1 exception.  The handlers have not been
-                * written yet.  Well, anyway there is no R6000 machine on the
-                * current list of targets for Linux/MIPS.
-                * (Duh, crap, there is someone with a triple R6k machine)
-                */
-               //set_except_vector(14, handle_mc);
-               //set_except_vector(15, handle_ndc);
-       }
-
-
        if (board_nmi_handler_setup)
                board_nmi_handler_setup();
 

diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 5aadc69c8ce39d8b894393e5d12e45fec934100c..79b9f2ad3ff514e0e48ab409d6465540a4fe097d 100644 (file)
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -2634,11 +2634,6 @@ void build_tlb_refill_handler(void)
 #endif
                break;
 
-       case CPU_R6000:
-       case CPU_R6000A:
-               panic("No R6000 TLB refill handler yet");
-               break;
-
        case CPU_R8000:
                panic("No R8000 TLB refill handler yet");
                break;