drm/nouveau: switch to vmm limit

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c
index 9fdca7b4cb05b00e06729d5c153f414939d907c8..f3ed5896b8423fbe9784f3b98d950f6f305c7fd7 100644 (file)
--- a/drivers/gpu/drm/nouveau/nouveau_chan.c
+++ b/drivers/gpu/drm/nouveau/nouveau_chan.c
@@ -107,7 +107,6 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device,
                     u32 size, struct nouveau_channel **pchan)
 {
        struct nouveau_cli *cli = (void *)device->object.client;
-       struct nvkm_mmu *mmu = nvxx_mmu(device);
        struct nv_dma_v0 args = {};
        struct nouveau_channel *chan;
        u32 target;
@@ -156,7 +155,7 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device,
                args.target = NV_DMA_V0_TARGET_VM;
                args.access = NV_DMA_V0_ACCESS_VM;
                args.start = 0;
-               args.limit = cli->vm->mmu->limit - 1;
+               args.limit = cli->vmm.vmm.limit - 1;
 
                chan->push.addr = chan->push.vma->addr;
        } else
@@ -188,7 +187,7 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device,
                        args.target = NV_DMA_V0_TARGET_VM;
                        args.access = NV_DMA_V0_ACCESS_RDWR;
                        args.start = 0;
-                       args.limit = mmu->limit - 1;
+                       args.limit = cli->vmm.vmm.limit - 1;
                }
        }
 
@@ -317,7 +316,6 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
        struct nvif_device *device = chan->device;
        struct nouveau_cli *cli = (void *)chan->user.client;
        struct nouveau_drm *drm = chan->drm;
-       struct nvkm_mmu *mmu = nvxx_mmu(device);
        struct nv_dma_v0 args = {};
        int ret, i;
 
@@ -342,7 +340,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
                        args.target = NV_DMA_V0_TARGET_VM;
                        args.access = NV_DMA_V0_ACCESS_VM;
                        args.start = 0;
-                       args.limit = cli->vm->mmu->limit - 1;
+                       args.limit = cli->vmm.vmm.limit - 1;
                } else {
                        args.target = NV_DMA_V0_TARGET_VRAM;
                        args.access = NV_DMA_V0_ACCESS_RDWR;
@@ -359,7 +357,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
                        args.target = NV_DMA_V0_TARGET_VM;
                        args.access = NV_DMA_V0_ACCESS_VM;
                        args.start = 0;
-                       args.limit = cli->vm->mmu->limit - 1;
+                       args.limit = cli->vmm.vmm.limit - 1;
                } else
                if (chan->drm->agp.bridge) {
                        args.target = NV_DMA_V0_TARGET_AGP;
@@ -371,7 +369,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
                        args.target = NV_DMA_V0_TARGET_VM;
                        args.access = NV_DMA_V0_ACCESS_RDWR;
                        args.start = 0;
-                       args.limit = mmu->limit - 1;
+                       args.limit = cli->vmm.vmm.limit - 1;
                }
 
                ret = nvif_object_init(&chan->user, gart, NV_DMA_IN_MEMORY,

diff --git a/drivers/gpu/drm/nouveau/nouveau_ttm.c b/drivers/gpu/drm/nouveau/nouveau_ttm.c
index f64a55421a96464ec4fed1e8ce12cceaf55857a7..15c1091cccb5c6ee5c0f207f87e95800a0464a7a 100644 (file)
--- a/drivers/gpu/drm/nouveau/nouveau_ttm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_ttm.c
@@ -323,7 +323,7 @@ nouveau_ttm_init(struct nouveau_drm *drm)
 
        /* GART init */
        if (!drm->agp.bridge) {
-               drm->gem.gart_available = nvxx_mmu(&drm->client.device)->limit;
+               drm->gem.gart_available = drm->client.vmm.vmm.limit;
        } else {
                drm->gem.gart_available = drm->agp.size;
        }