]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/i915/icl: WaDisableImprovedTdlClkGating
authorOscar Mateo <oscar.mateo@intel.com>
Fri, 25 May 2018 22:05:29 +0000 (15:05 -0700)
committerMika Kuoppala <mika.kuoppala@linux.intel.com>
Tue, 29 May 2018 12:52:24 +0000 (15:52 +0300)
Revert to the legacy implementation.

v2: GEN7_ROW_CHICKEN2 is masked
v3:
  - Rebased
  - Renamed to Wa_2006611047
  - A0 and B0 only
v4:
  - Add spaces around '<<' (and fix the surrounding code as well)
  - Mark the WA as pre-prod
v5: Rebased on top of the WA refactoring
v6: Added References (Mika)
v7: Fixed in B0

References: HSDES#2006611047
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1527285939-20113-2-git-send-email-oscar.mateo@intel.com
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_workarounds.c

index 6953419881c4848dc39b47a9f84ddd33af543942..4eb159faf06db35928612daefc2715bce4fbf609 100644 (file)
@@ -8328,8 +8328,9 @@ enum {
 
 #define GEN7_ROW_CHICKEN2              _MMIO(0xe4f4)
 #define GEN7_ROW_CHICKEN2_GT2          _MMIO(0xf4f4)
-#define   DOP_CLOCK_GATING_DISABLE     (1<<0)
-#define   PUSH_CONSTANT_DEREF_DISABLE  (1<<8)
+#define   DOP_CLOCK_GATING_DISABLE     (1 << 0)
+#define   PUSH_CONSTANT_DEREF_DISABLE  (1 << 8)
+#define   GEN11_TDL_CLOCK_GATING_FIX_DISABLE   (1 << 1)
 
 #define HSW_ROW_CHICKEN3               _MMIO(0xe49c)
 #define  HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE    (1 << 6)
index cea57104de13460bad06d58b6425e5f681f89361..04aa88506edc60f7682ec2401e8f04869fad402f 100644 (file)
@@ -463,6 +463,13 @@ static int icl_ctx_workarounds_init(struct drm_i915_private *dev_priv)
         */
        WA_SET_BIT_MASKED(ICL_HDC_MODE, HDC_FORCE_NON_COHERENT);
 
+       /* Wa_2006611047:icl (pre-prod)
+        * Formerly known as WaDisableImprovedTdlClkGating
+        */
+       if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_A0))
+               WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
+                                 GEN11_TDL_CLOCK_GATING_FIX_DISABLE);
+
        return 0;
 }