drm/nouveau/disp/nv50-: simplify definition of base channels

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild
index b53a0e2cfee37e80bd8f59255e06258c2705759b..c2d56bb5a452919fff2d83df7d8861fe35cfb858 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild
@@ -73,11 +73,7 @@ nvkm-y += nvkm/engine/disp/dmacgp102.o
 
 nvkm-y += nvkm/engine/disp/basenv50.o
 nvkm-y += nvkm/engine/disp/baseg84.o
-nvkm-y += nvkm/engine/disp/basegt200.o
-nvkm-y += nvkm/engine/disp/basegt215.o
 nvkm-y += nvkm/engine/disp/basegf119.o
-nvkm-y += nvkm/engine/disp/basegk104.o
-nvkm-y += nvkm/engine/disp/basegk110.o
 nvkm-y += nvkm/engine/disp/basegp102.o
 
 nvkm-y += nvkm/engine/disp/corenv50.o

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/baseg84.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/baseg84.c
index 6d17630a3dee5a2f93b892579479911534a05ba0..03ec508d19f05c0e70a8194855363469ec210c53 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/baseg84.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/baseg84.c
@@ -22,9 +22,6 @@
  * Authors: Ben Skeggs
  */
 #include "dmacnv50.h"
-#include "rootnv50.h"
-
-#include <nvif/class.h>
 
 static const struct nv50_disp_mthd_list
 g84_disp_base_mthd_base = {
@@ -56,8 +53,8 @@ g84_disp_base_mthd_base = {
        }
 };
 
-const struct nv50_disp_chan_mthd
-g84_disp_base_chan_mthd = {
+static const struct nv50_disp_chan_mthd
+g84_disp_base_mthd = {
        .name = "Base",
        .addr = 0x000540,
        .prev = 0x000004,
@@ -68,13 +65,10 @@ g84_disp_base_chan_mthd = {
        }
 };
 
-const struct nv50_disp_dmac_oclass
-g84_disp_base_oclass = {
-       .base.oclass = G82_DISP_BASE_CHANNEL_DMA,
-       .base.minver = 0,
-       .base.maxver = 0,
-       .ctor = nv50_disp_base_new,
-       .func = &nv50_disp_dmac_func,
-       .mthd = &g84_disp_base_chan_mthd,
-       .chid = 1,
-};
+int
+g84_disp_base_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
+                 struct nv50_disp *disp, struct nvkm_object **pobject)
+{
+       return nv50_disp_base_new_(&nv50_disp_dmac_func, &g84_disp_base_mthd,
+                                  disp, 1, oclass, argv, argc, pobject);
+}

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegf119.c
index ebcb925e9d9083d5cb5a7cb8bff447750b5adf01..4c372dc6a1286722be1b5e431884c6871df0239b 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegf119.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegf119.c
@@ -22,9 +22,6 @@
  * Authors: Ben Skeggs
  */
 #include "dmacnv50.h"
-#include "rootnv50.h"
-
-#include <nvif/class.h>
 
 static const struct nv50_disp_mthd_list
 gf119_disp_base_mthd_base = {
@@ -91,7 +88,7 @@ gf119_disp_base_mthd_image = {
 };
 
 const struct nv50_disp_chan_mthd
-gf119_disp_base_chan_mthd = {
+gf119_disp_base_mthd = {
        .name = "Base",
        .addr = 0x001000,
        .prev = -0x020000,
@@ -102,13 +99,10 @@ gf119_disp_base_chan_mthd = {
        }
 };
 
-const struct nv50_disp_dmac_oclass
-gf119_disp_base_oclass = {
-       .base.oclass = GF110_DISP_BASE_CHANNEL_DMA,
-       .base.minver = 0,
-       .base.maxver = 0,
-       .ctor = nv50_disp_base_new,
-       .func = &gf119_disp_dmac_func,
-       .mthd = &gf119_disp_base_chan_mthd,
-       .chid = 1,
-};
+int
+gf119_disp_base_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
+                   struct nv50_disp *disp, struct nvkm_object **pobject)
+{
+       return nv50_disp_base_new_(&gf119_disp_dmac_func, &gf119_disp_base_mthd,
+                                  disp, 1, oclass, argv, argc, pobject);
+}

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegk104.c
deleted file mode 100644 (file)
index 780a1d9..0000000
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegk104.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright 2015 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs <bskeggs@redhat.com>
- */
-#include "dmacnv50.h"
-#include "rootnv50.h"
-
-#include <nvif/class.h>
-
-const struct nv50_disp_dmac_oclass
-gk104_disp_base_oclass = {
-       .base.oclass = GK104_DISP_BASE_CHANNEL_DMA,
-       .base.minver = 0,
-       .base.maxver = 0,
-       .ctor = nv50_disp_base_new,
-       .func = &gf119_disp_dmac_func,
-       .mthd = &gf119_disp_base_chan_mthd,
-       .chid = 1,
-};

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegk110.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegk110.c
deleted file mode 100644 (file)
index d8bdd24..0000000
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegk110.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright 2015 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs <bskeggs@redhat.com>
- */
-#include "dmacnv50.h"
-#include "rootnv50.h"
-
-#include <nvif/class.h>
-
-const struct nv50_disp_dmac_oclass
-gk110_disp_base_oclass = {
-       .base.oclass = GK110_DISP_BASE_CHANNEL_DMA,
-       .base.minver = 0,
-       .base.maxver = 0,
-       .ctor = nv50_disp_base_new,
-       .func = &gf119_disp_dmac_func,
-       .mthd = &gf119_disp_base_chan_mthd,
-       .chid = 1,
-};

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegp102.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegp102.c
index 8a3cdeef8d2cd03ef467c02d458ebec44f560739..3a25259de0574287990e59697afa0c09aca89ecf 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegp102.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegp102.c
@@ -22,17 +22,11 @@
  * Authors: Ben Skeggs <bskeggs@redhat.com>
  */
 #include "dmacnv50.h"
-#include "rootnv50.h"
 
-#include <nvif/class.h>
-
-const struct nv50_disp_dmac_oclass
-gp102_disp_base_oclass = {
-       .base.oclass = GK110_DISP_BASE_CHANNEL_DMA,
-       .base.minver = 0,
-       .base.maxver = 0,
-       .ctor = nv50_disp_base_new,
-       .func = &gp102_disp_dmac_func,
-       .mthd = &gf119_disp_base_chan_mthd,
-       .chid = 1,
-};
+int
+gp102_disp_base_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
+                   struct nv50_disp *disp, struct nvkm_object **pobject)
+{
+       return nv50_disp_base_new_(&gp102_disp_dmac_func, &gf119_disp_base_mthd,
+                                  disp, 1, oclass, argv, argc, pobject);
+}

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegt200.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegt200.c
deleted file mode 100644 (file)
index 93451e4..0000000
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegt200.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright 2015 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs <bskeggs@redhat.com>
- */
-#include "dmacnv50.h"
-#include "rootnv50.h"
-
-#include <nvif/class.h>
-
-const struct nv50_disp_dmac_oclass
-gt200_disp_base_oclass = {
-       .base.oclass = GT200_DISP_BASE_CHANNEL_DMA,
-       .base.minver = 0,
-       .base.maxver = 0,
-       .ctor = nv50_disp_base_new,
-       .func = &nv50_disp_dmac_func,
-       .mthd = &g84_disp_base_chan_mthd,
-       .chid = 1,
-};

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegt215.c
deleted file mode 100644 (file)
index 08e2b1f..0000000
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegt215.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright 2015 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs <bskeggs@redhat.com>
- */
-#include "dmacnv50.h"
-#include "rootnv50.h"
-
-#include <nvif/class.h>
-
-const struct nv50_disp_dmac_oclass
-gt215_disp_base_oclass = {
-       .base.oclass = GT214_DISP_BASE_CHANNEL_DMA,
-       .base.minver = 0,
-       .base.maxver = 0,
-       .ctor = nv50_disp_base_new,
-       .func = &nv50_disp_dmac_func,
-       .mthd = &g84_disp_base_chan_mthd,
-       .chid = 1,
-};

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basenv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/basenv50.c
index 418741a61f115e8a261b1b368745263312d2be00..11639e2a792f4ad5e19f7e108de19448a7dd299e 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basenv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/basenv50.c
@@ -23,31 +23,28 @@
  */
 #include "dmacnv50.h"
 #include "head.h"
-#include "rootnv50.h"
 
 #include <core/client.h>
 
-#include <nvif/class.h>
 #include <nvif/cl507c.h>
 #include <nvif/unpack.h>
 
 int
-nv50_disp_base_new(const struct nv50_disp_dmac_func *func,
-                  const struct nv50_disp_chan_mthd *mthd,
-                  struct nv50_disp_root *root, int chid,
-                  const struct nvkm_oclass *oclass, void *data, u32 size,
-                  struct nvkm_object **pobject)
+nv50_disp_base_new_(const struct nv50_disp_dmac_func *func,
+                   const struct nv50_disp_chan_mthd *mthd,
+                   struct nv50_disp *disp, int chid,
+                   const struct nvkm_oclass *oclass, void *argv, u32 argc,
+                   struct nvkm_object **pobject)
 {
        union {
                struct nv50_disp_base_channel_dma_v0 v0;
-       } *args = data;
+       } *args = argv;
        struct nvkm_object *parent = oclass->parent;
-       struct nv50_disp *disp = root->disp;
        int head, ret = -ENOSYS;
        u64 push;
 
-       nvif_ioctl(parent, "create disp base channel dma size %d\n", size);
-       if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) {
+       nvif_ioctl(parent, "create disp base channel dma size %d\n", argc);
+       if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) {
                nvif_ioctl(parent, "create disp base channel dma vers %d "
                                   "pushbuf %016llx head %d\n",
                           args->v0.version, args->v0.pushbuf, args->v0.head);
@@ -102,7 +99,7 @@ nv50_disp_base_mthd_image = {
 };
 
 static const struct nv50_disp_chan_mthd
-nv50_disp_base_chan_mthd = {
+nv50_disp_base_mthd = {
        .name = "Base",
        .addr = 0x000540,
        .prev = 0x000004,
@@ -113,13 +110,10 @@ nv50_disp_base_chan_mthd = {
        }
 };
 
-const struct nv50_disp_dmac_oclass
-nv50_disp_base_oclass = {
-       .base.oclass = NV50_DISP_BASE_CHANNEL_DMA,
-       .base.minver = 0,
-       .base.maxver = 0,
-       .ctor = nv50_disp_base_new,
-       .func = &nv50_disp_dmac_func,
-       .mthd = &nv50_disp_base_chan_mthd,
-       .chid = 1,
-};
+int
+nv50_disp_base_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
+                  struct nv50_disp *disp, struct nvkm_object **pobject)
+{
+       return nv50_disp_base_new_(&nv50_disp_dmac_func, &nv50_disp_base_mthd,
+                                  disp, 1, oclass, argv, argc, pobject);
+}

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h
index ba30766fe342ff7ea0918f6aae31da61a4937c3c..5d162775de19177d0614b46d4c74d67d79787b2a 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h
@@ -54,6 +54,11 @@ int nv50_disp_oimm_new_(const struct nv50_disp_chan_func *,
                        struct nv50_disp *, int ctrl, int user,
                        const struct nvkm_oclass *, void *argv, u32 argc,
                        struct nvkm_object **);
+int nv50_disp_base_new_(const struct nv50_disp_dmac_func *,
+                       const struct nv50_disp_chan_mthd *,
+                       struct nv50_disp *, int chid,
+                       const struct nvkm_oclass *, void *argv, u32 argc,
+                       struct nvkm_object **);
 int nv50_disp_ovly_new_(const struct nv50_disp_dmac_func *,
                        const struct nv50_disp_chan_mthd *,
                        struct nv50_disp *, int chid,
@@ -62,9 +67,13 @@ int nv50_disp_ovly_new_(const struct nv50_disp_dmac_func *,
 
 int nv50_disp_oimm_new(const struct nvkm_oclass *, void *, u32,
                       struct nv50_disp *, struct nvkm_object **);
+int nv50_disp_base_new(const struct nvkm_oclass *, void *, u32,
+                      struct nv50_disp *, struct nvkm_object **);
 int nv50_disp_ovly_new(const struct nvkm_oclass *, void *, u32,
                       struct nv50_disp *, struct nvkm_object **);
 
+int g84_disp_base_new(const struct nvkm_oclass *, void *, u32,
+                     struct nv50_disp *, struct nvkm_object **);
 int g84_disp_ovly_new(const struct nvkm_oclass *, void *, u32,
                      struct nv50_disp *, struct nvkm_object **);
 
@@ -73,6 +82,8 @@ int gt200_disp_ovly_new(const struct nvkm_oclass *, void *, u32,
 
 int gf119_disp_oimm_new(const struct nvkm_oclass *, void *, u32,
                        struct nv50_disp *, struct nvkm_object **);
+int gf119_disp_base_new(const struct nvkm_oclass *, void *, u32,
+                       struct nv50_disp *, struct nvkm_object **);
 int gf119_disp_ovly_new(const struct nvkm_oclass *, void *, u32,
                        struct nv50_disp *, struct nvkm_object **);
 
@@ -81,6 +92,8 @@ int gk104_disp_ovly_new(const struct nvkm_oclass *, void *, u32,
 
 int gp102_disp_oimm_new(const struct nvkm_oclass *, void *, u32,
                        struct nv50_disp *, struct nvkm_object **);
+int gp102_disp_base_new(const struct nvkm_oclass *, void *, u32,
+                       struct nv50_disp *, struct nvkm_object **);
 int gp102_disp_ovly_new(const struct nvkm_oclass *, void *, u32,
                        struct nv50_disp *, struct nvkm_object **);
 
@@ -115,7 +128,6 @@ extern const struct nv50_disp_mthd_list nv50_disp_base_mthd_image;
 extern const struct nv50_disp_chan_mthd g84_disp_core_chan_mthd;
 extern const struct nv50_disp_mthd_list g84_disp_core_mthd_dac;
 extern const struct nv50_disp_mthd_list g84_disp_core_mthd_head;
-extern const struct nv50_disp_chan_mthd g84_disp_base_chan_mthd;
 
 extern const struct nv50_disp_chan_mthd g94_disp_core_chan_mthd;
 
@@ -123,7 +135,7 @@ extern const struct nv50_disp_mthd_list gf119_disp_core_mthd_base;
 extern const struct nv50_disp_mthd_list gf119_disp_core_mthd_dac;
 extern const struct nv50_disp_mthd_list gf119_disp_core_mthd_sor;
 extern const struct nv50_disp_mthd_list gf119_disp_core_mthd_pior;
-extern const struct nv50_disp_chan_mthd gf119_disp_base_chan_mthd;
+extern const struct nv50_disp_chan_mthd gf119_disp_base_mthd;
 
 extern const struct nv50_disp_chan_mthd gk104_disp_core_chan_mthd;
 extern const struct nv50_disp_chan_mthd gk104_disp_ovly_mthd;

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.h b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.h
index 45caaee86744324822b717808b7568a61fba3399..ae094c7c47f5d21044ef2dcca36ee84453d817f5 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.h
@@ -50,34 +50,22 @@ int nv50_disp_core_new(const struct nv50_disp_dmac_func *,
                       struct nv50_disp_root *, int chid,
                       const struct nvkm_oclass *oclass, void *data, u32 size,
                       struct nvkm_object **);
-int nv50_disp_base_new(const struct nv50_disp_dmac_func *,
-                      const struct nv50_disp_chan_mthd *,
-                      struct nv50_disp_root *, int chid,
-                      const struct nvkm_oclass *oclass, void *data, u32 size,
-                      struct nvkm_object **);
 
 extern const struct nv50_disp_dmac_oclass nv50_disp_core_oclass;
-extern const struct nv50_disp_dmac_oclass nv50_disp_base_oclass;
 
 extern const struct nv50_disp_dmac_oclass g84_disp_core_oclass;
-extern const struct nv50_disp_dmac_oclass g84_disp_base_oclass;
 
 extern const struct nv50_disp_dmac_oclass g94_disp_core_oclass;
 
 extern const struct nv50_disp_dmac_oclass gt200_disp_core_oclass;
-extern const struct nv50_disp_dmac_oclass gt200_disp_base_oclass;
 
 extern const struct nv50_disp_dmac_oclass gt215_disp_core_oclass;
-extern const struct nv50_disp_dmac_oclass gt215_disp_base_oclass;
 
 extern const struct nv50_disp_dmac_oclass gf119_disp_core_oclass;
-extern const struct nv50_disp_dmac_oclass gf119_disp_base_oclass;
 
 extern const struct nv50_disp_dmac_oclass gk104_disp_core_oclass;
-extern const struct nv50_disp_dmac_oclass gk104_disp_base_oclass;
 
 extern const struct nv50_disp_dmac_oclass gk110_disp_core_oclass;
-extern const struct nv50_disp_dmac_oclass gk110_disp_base_oclass;
 
 extern const struct nv50_disp_dmac_oclass gm107_disp_core_oclass;
 
@@ -86,5 +74,4 @@ extern const struct nv50_disp_dmac_oclass gm200_disp_core_oclass;
 extern const struct nv50_disp_dmac_oclass gp100_disp_core_oclass;
 
 extern const struct nv50_disp_dmac_oclass gp102_disp_core_oclass;
-extern const struct nv50_disp_dmac_oclass gp102_disp_base_oclass;
 #endif

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootg84.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootg84.c
index 650ed0df1f3e70030907957c353d67c085976d4a..fa9076ba0a751a77e8c67a99fec07ab2fce9544f 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootg84.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootg84.c
@@ -30,13 +30,13 @@ static const struct nv50_disp_root_func
 g84_disp_root = {
        .dmac = {
                &g84_disp_core_oclass,
-               &g84_disp_base_oclass,
        },
        .pioc = {
                &g84_disp_curs_oclass,
        },
        .user = {
                {{0,0,G82_DISP_OVERLAY            }, nv50_disp_oimm_new },
+               {{0,0,G82_DISP_BASE_CHANNEL_DMA   },  g84_disp_base_new },
                {{0,0,G82_DISP_OVERLAY_CHANNEL_DMA},  g84_disp_ovly_new },
                {}
        },

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootg94.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootg94.c
index 19d23e0e2d28985282649b5a36580e4ba0a3eb2b..6aeab0f0278b32820d0e10ef6ba6770c8f3402b2 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootg94.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootg94.c
@@ -30,13 +30,13 @@ static const struct nv50_disp_root_func
 g94_disp_root = {
        .dmac = {
                &g94_disp_core_oclass,
-               &gt200_disp_base_oclass,
        },
        .pioc = {
                &g84_disp_curs_oclass,
        },
        .user = {
                {{0,0,  G82_DISP_OVERLAY            },  nv50_disp_oimm_new },
+               {{0,0,GT200_DISP_BASE_CHANNEL_DMA   },   g84_disp_base_new },
                {{0,0,GT200_DISP_OVERLAY_CHANNEL_DMA}, gt200_disp_ovly_new },
                {}
        },

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgf119.c
index ef8be6a06b59364473af0dfc307b1d1d426c4867..b44b145059492d2de99394a3a790f068ee037b9c 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgf119.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgf119.c
@@ -30,13 +30,13 @@ static const struct nv50_disp_root_func
 gf119_disp_root = {
        .dmac = {
                &gf119_disp_core_oclass,
-               &gf119_disp_base_oclass,
        },
        .pioc = {
                &gf119_disp_curs_oclass,
        },
        .user = {
                {{0,0,GF110_DISP_OVERLAY            }, gf119_disp_oimm_new },
+               {{0,0,GF110_DISP_BASE_CHANNEL_DMA   }, gf119_disp_base_new },
                {{0,0,GF110_DISP_OVERLAY_CONTROL_DMA}, gf119_disp_ovly_new },
                {}
        },

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgk104.c
index 67002c02015d7b2056848f2b6fb399e098803b92..c43eab97a3932fd606d0e34c3754f08895e7b165 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgk104.c
@@ -30,13 +30,13 @@ static const struct nv50_disp_root_func
 gk104_disp_root = {
        .dmac = {
                &gk104_disp_core_oclass,
-               &gk104_disp_base_oclass,
        },
        .pioc = {
                &gk104_disp_curs_oclass,
        },
        .user = {
                {{0,0,GK104_DISP_OVERLAY            }, gf119_disp_oimm_new },
+               {{0,0,GK104_DISP_BASE_CHANNEL_DMA   }, gf119_disp_base_new },
                {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, gk104_disp_ovly_new },
                {}
        },

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgk110.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgk110.c
index f82cf9c7bc87faca55e74e18d061d170daaaef2b..2d48e73597b0cc28f63df7cfc51f1f5a2be16ee1 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgk110.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgk110.c
@@ -30,13 +30,13 @@ static const struct nv50_disp_root_func
 gk110_disp_root = {
        .dmac = {
                &gk110_disp_core_oclass,
-               &gk110_disp_base_oclass,
        },
        .pioc = {
                &gk104_disp_curs_oclass,
        },
        .user = {
                {{0,0,GK104_DISP_OVERLAY            }, gf119_disp_oimm_new },
+               {{0,0,GK110_DISP_BASE_CHANNEL_DMA   }, gf119_disp_base_new },
                {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, gk104_disp_ovly_new },
                {}
        },

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgm107.c
index 170961e61da1f785d9ec95bd5eea7124311170db..904125e8199f7919794ff6d4f01bcee43b2f69bb 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgm107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgm107.c
@@ -30,13 +30,13 @@ static const struct nv50_disp_root_func
 gm107_disp_root = {
        .dmac = {
                &gm107_disp_core_oclass,
-               &gk110_disp_base_oclass,
        },
        .pioc = {
                &gk104_disp_curs_oclass,
        },
        .user = {
                {{0,0,GK104_DISP_OVERLAY            }, gf119_disp_oimm_new },
+               {{0,0,GK110_DISP_BASE_CHANNEL_DMA   }, gf119_disp_base_new },
                {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, gk104_disp_ovly_new },
                {}
        },

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgm200.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgm200.c
index 3f77682aa01751b4b156dacc70d3839ec7be8bf4..52e9ccac93fa2f9808828f4d97699d0a67c3dc6b 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgm200.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgm200.c
@@ -30,13 +30,13 @@ static const struct nv50_disp_root_func
 gm200_disp_root = {
        .dmac = {
                &gm200_disp_core_oclass,
-               &gk110_disp_base_oclass,
        },
        .pioc = {
                &gk104_disp_curs_oclass,
        },
        .user = {
                {{0,0,GK104_DISP_OVERLAY            }, gf119_disp_oimm_new },
+               {{0,0,GK110_DISP_BASE_CHANNEL_DMA   }, gf119_disp_base_new },
                {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, gk104_disp_ovly_new },
                {}
        },

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgp100.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgp100.c
index c87b1d238098f396dbf50c0fb5e25f6e2de9dd26..57f40d4930f730852938692af5d55144a352c1ed 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgp100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgp100.c
@@ -30,13 +30,13 @@ static const struct nv50_disp_root_func
 gp100_disp_root = {
        .dmac = {
                &gp100_disp_core_oclass,
-               &gk110_disp_base_oclass,
        },
        .pioc = {
                &gk104_disp_curs_oclass,
        },
        .user = {
                {{0,0,GK104_DISP_OVERLAY            }, gf119_disp_oimm_new },
+               {{0,0,GK110_DISP_BASE_CHANNEL_DMA   }, gf119_disp_base_new },
                {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, gk104_disp_ovly_new },
                {}
        },

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgp102.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgp102.c
index 16516a46cc916e97dfb677a71aded51fe4ed146d..f66d7fced3def633a426d5d6ac4e03627fe531ad 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgp102.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgp102.c
@@ -30,13 +30,13 @@ static const struct nv50_disp_root_func
 gp102_disp_root = {
        .dmac = {
                &gp102_disp_core_oclass,
-               &gp102_disp_base_oclass,
        },
        .pioc = {
                &gp102_disp_curs_oclass,
        },
        .user = {
                {{0,0,GK104_DISP_OVERLAY            }, gp102_disp_oimm_new },
+               {{0,0,GK110_DISP_BASE_CHANNEL_DMA   }, gp102_disp_base_new },
                {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, gp102_disp_ovly_new },
                {}
        },

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgt200.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgt200.c
index 6d46bf6cfdb73e596d4bf8a5211fe355bd5f7435..c28017998bc6a776b304bc7d7aa58909f9418af3 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgt200.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgt200.c
@@ -30,13 +30,13 @@ static const struct nv50_disp_root_func
 gt200_disp_root = {
        .dmac = {
                &gt200_disp_core_oclass,
-               &gt200_disp_base_oclass,
        },
        .pioc = {
                &g84_disp_curs_oclass,
        },
        .user = {
                {{0,0,  G82_DISP_OVERLAY            },  nv50_disp_oimm_new },
+               {{0,0,GT200_DISP_BASE_CHANNEL_DMA   },   g84_disp_base_new },
                {{0,0,GT200_DISP_OVERLAY_CHANNEL_DMA}, gt200_disp_ovly_new },
                {}
        },

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgt215.c
index 6863c94ec22d65595dd39aa71756827358fdbb3c..b9a6a32de82f6a0352918805d99224decc7984ed 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgt215.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgt215.c
@@ -30,13 +30,13 @@ static const struct nv50_disp_root_func
 gt215_disp_root = {
        .dmac = {
                &gt215_disp_core_oclass,
-               &gt215_disp_base_oclass,
        },
        .pioc = {
                &gt215_disp_curs_oclass,
        },
        .user = {
                {{0,0,GT214_DISP_OVERLAY            },  nv50_disp_oimm_new },
+               {{0,0,GT214_DISP_BASE_CHANNEL_DMA   },   g84_disp_base_new },
                {{0,0,GT214_DISP_OVERLAY_CHANNEL_DMA},   g84_disp_ovly_new },
                {}
        },

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c
index 41219c2d487c2d7f1b49eab64ef09b471fdfe323..a87531d9a3b8ed3d6d56389f5fd92c8415203d9c 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c
@@ -368,13 +368,13 @@ static const struct nv50_disp_root_func
 nv50_disp_root = {
        .dmac = {
                &nv50_disp_core_oclass,
-               &nv50_disp_base_oclass,
        },
        .pioc = {
                &nv50_disp_curs_oclass,
        },
        .user = {
                {{0,0,NV50_DISP_OVERLAY            }, nv50_disp_oimm_new },
+               {{0,0,NV50_DISP_BASE_CHANNEL_DMA   }, nv50_disp_base_new },
                {{0,0,NV50_DISP_OVERLAY_CHANNEL_DMA}, nv50_disp_ovly_new },
                {}
        },

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.h b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.h
index 67f951864977dba3ae746463e052453b7f126bd2..371c6ee323131a28835f8e726f3d86e99c383c4d 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.h
@@ -13,7 +13,7 @@ struct nv50_disp_root {
 };
 
 struct nv50_disp_root_func {
-       const struct nv50_disp_dmac_oclass *dmac[2];
+       const struct nv50_disp_dmac_oclass *dmac[1];
        const struct nv50_disp_pioc_oclass *pioc[1];
        struct nv50_disp_user {
                struct nvkm_sclass base;