]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/amdkfd: make the sdma vm init to be asic specific
authorOded Gabbay <oded.gabbay@gmail.com>
Tue, 5 May 2015 08:51:39 +0000 (11:51 +0300)
committerOded Gabbay <oded.gabbay@gmail.com>
Tue, 19 May 2015 09:13:39 +0000 (12:13 +0300)
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c

index 69af73f153103075f00c9344f836bd7eb3b24668..1eb102295de016a76e4b68832cb8499625af9b9e 100644 (file)
@@ -614,19 +614,6 @@ static void deallocate_sdma_queue(struct device_queue_manager *dqm,
        set_bit(sdma_queue_id, (unsigned long *)&dqm->sdma_bitmap);
 }
 
-static void init_sdma_vm(struct device_queue_manager *dqm, struct queue *q,
-                               struct qcm_process_device *qpd)
-{
-       uint32_t value = SDMA_ATC;
-
-       if (q->process->is_32bit_user_mode)
-               value |= SDMA_VA_PTR32 | get_sh_mem_bases_32(qpd_to_pdd(qpd));
-       else
-               value |= SDMA_VA_SHARED_BASE(get_sh_mem_bases_nybble_64(
-                                                       qpd_to_pdd(qpd)));
-       q->properties.sdma_vm_addr = value;
-}
-
 static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm,
                                        struct queue *q,
                                        struct qcm_process_device *qpd)
@@ -649,7 +636,7 @@ static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm,
        pr_debug("     sdma queue id: %d\n", q->properties.sdma_queue_id);
        pr_debug("     sdma engine id: %d\n", q->properties.sdma_engine_id);
 
-       init_sdma_vm(dqm, q, qpd);
+       dqm->ops_asic_specific.init_sdma_vm(dqm, q, qpd);
        retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj,
                                &q->gart_mqd_addr, &q->properties);
        if (retval != 0) {
index 650ae1c9ceca33546e6779c52063c1f955ee9ace..57278e2d72e0ae6b76c4fc519144016ee024dcdc 100644 (file)
@@ -130,6 +130,9 @@ struct device_queue_manager_asic_ops {
                                           enum cache_policy alternate_policy,
                                           void __user *alternate_aperture_base,
                                           uint64_t alternate_aperture_size);
+       void    (*init_sdma_vm)(struct device_queue_manager *dqm,
+                               struct queue *q,
+                               struct qcm_process_device *qpd);
 };
 
 /**
index 292d13ff3ef584e9f411c2af2cbb2bdb430b22f3..9ce8a20a7aff0760e57e8028b635abd21749546a 100644 (file)
@@ -33,12 +33,15 @@ static bool set_cache_memory_policy_cik(struct device_queue_manager *dqm,
 static int register_process_cik(struct device_queue_manager *dqm,
                                        struct qcm_process_device *qpd);
 static int initialize_cpsch_cik(struct device_queue_manager *dqm);
+static void init_sdma_vm(struct device_queue_manager *dqm, struct queue *q,
+                               struct qcm_process_device *qpd);
 
 void device_queue_manager_init_cik(struct device_queue_manager_asic_ops *ops)
 {
        ops->set_cache_memory_policy = set_cache_memory_policy_cik;
        ops->register_process = register_process_cik;
        ops->initialize = initialize_cpsch_cik;
+       ops->init_sdma_vm = init_sdma_vm;
 }
 
 static uint32_t compute_sh_mem_bases_64bit(unsigned int top_address_nybble)
@@ -129,6 +132,19 @@ static int register_process_cik(struct device_queue_manager *dqm,
        return 0;
 }
 
+static void init_sdma_vm(struct device_queue_manager *dqm, struct queue *q,
+                               struct qcm_process_device *qpd)
+{
+       uint32_t value = SDMA_ATC;
+
+       if (q->process->is_32bit_user_mode)
+               value |= SDMA_VA_PTR32 | get_sh_mem_bases_32(qpd_to_pdd(qpd));
+       else
+               value |= SDMA_VA_SHARED_BASE(get_sh_mem_bases_nybble_64(
+                                                       qpd_to_pdd(qpd)));
+       q->properties.sdma_vm_addr = value;
+}
+
 static int initialize_cpsch_cik(struct device_queue_manager *dqm)
 {
        return init_pipelines(dqm, get_pipes_num(dqm), get_first_pipe(dqm));
index 8b00ccf1f7955f51b7146e94c9326b115b5a7693..4c15212a38996ec6bde7ccf083d3a0f413b35465 100644 (file)
@@ -32,6 +32,8 @@ static bool set_cache_memory_policy_vi(struct device_queue_manager *dqm,
 static int register_process_vi(struct device_queue_manager *dqm,
                                        struct qcm_process_device *qpd);
 static int initialize_cpsch_vi(struct device_queue_manager *dqm);
+static void init_sdma_vm(struct device_queue_manager *dqm, struct queue *q,
+                               struct qcm_process_device *qpd);
 
 void device_queue_manager_init_vi(struct device_queue_manager_asic_ops *ops)
 {
@@ -40,6 +42,7 @@ void device_queue_manager_init_vi(struct device_queue_manager_asic_ops *ops)
        ops->set_cache_memory_policy = set_cache_memory_policy_vi;
        ops->register_process = register_process_vi;
        ops->initialize = initialize_cpsch_vi;
+       ops->init_sdma_vm = init_sdma_vm;
 }
 
 static bool set_cache_memory_policy_vi(struct device_queue_manager *dqm,
@@ -58,6 +61,11 @@ static int register_process_vi(struct device_queue_manager *dqm,
        return -1;
 }
 
+static void init_sdma_vm(struct device_queue_manager *dqm, struct queue *q,
+                               struct qcm_process_device *qpd)
+{
+}
+
 static int initialize_cpsch_vi(struct device_queue_manager *dqm)
 {
        return 0;