]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
spi: spi-fsl-dspi: Enable extended SPI mode
authorEsben Haabendal <eha@deif.com>
Wed, 20 Jun 2018 07:34:42 +0000 (09:34 +0200)
committerMark Brown <broonie@kernel.org>
Wed, 20 Jun 2018 13:48:27 +0000 (14:48 +0100)
Set the XSPI bit for devices configured for XSPI mode (currently LS1021A),
and thereby switch to extended SPI mode, allowing for SPI transfers using
from 4 to 32 bits per word instead of 4 to 16 bits per word.

Signed-off-by: Esben Haabendal <eha@deif.com>
Acked-by: Martin Hundebøll <martin@geanix.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-fsl-dspi.c

index eed55491b2c9bc60a30c7265b385466b68b56a1f..1f85dcdb2203a3f2ff636f638f2c345e80ae531a 100644 (file)
@@ -46,6 +46,7 @@
 #define SPI_MCR_PCSIS          (0x3F << 16)
 #define SPI_MCR_CLR_TXF        (1 << 11)
 #define SPI_MCR_CLR_RXF        (1 << 10)
+#define SPI_MCR_XSPI           (1 << 3)
 
 #define SPI_TCR                        0x08
 #define SPI_TCR_GET_TCNT(x)    (((x) & 0xffff0000) >> 16)
@@ -968,7 +969,8 @@ static const struct regmap_config dspi_xspi_regmap_config[] = {
 
 static void dspi_init(struct fsl_dspi *dspi)
 {
-       regmap_write(dspi->regmap, SPI_MCR, SPI_MCR_MASTER | SPI_MCR_PCSIS);
+       regmap_write(dspi->regmap, SPI_MCR, SPI_MCR_MASTER | SPI_MCR_PCSIS |
+                    (dspi->devtype_data->xspi_mode ? SPI_MCR_XSPI : 0));
        regmap_write(dspi->regmap, SPI_SR, SPI_SR_CLEAR);
        if (dspi->devtype_data->xspi_mode)
                regmap_write(dspi->regmap, SPI_CTARE(0),