},
};
-/*
- * 'gmac' class
- * cpsw/gmac sub system
- */
-static struct omap_hwmod_class_sysconfig dra7xx_gmac_sysc = {
- .rev_offs = 0x0,
- .sysc_offs = 0x8,
- .syss_offs = 0x4,
- .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
- SYSS_HAS_RESET_STATUS),
- .idlemodes = (SIDLE_FORCE | SIDLE_NO | MSTANDBY_FORCE |
- MSTANDBY_NO),
- .sysc_fields = &omap_hwmod_sysc_type3,
-};
-
-static struct omap_hwmod_class dra7xx_gmac_hwmod_class = {
- .name = "gmac",
- .sysc = &dra7xx_gmac_sysc,
-};
-
-static struct omap_hwmod dra7xx_gmac_hwmod = {
- .name = "gmac",
- .class = &dra7xx_gmac_hwmod_class,
- .clkdm_name = "gmac_clkdm",
- .flags = (HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY),
- .main_clk = "dpll_gmac_ck",
- .mpu_rt_idx = 1,
- .prcm = {
- .omap4 = {
- .clkctrl_offs = DRA7XX_CM_GMAC_GMAC_CLKCTRL_OFFSET,
- .context_offs = DRA7XX_RM_GMAC_GMAC_CONTEXT_OFFSET,
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
-};
-
-/*
- * 'mdio' class
- */
-static struct omap_hwmod_class dra7xx_mdio_hwmod_class = {
- .name = "davinci_mdio",
-};
-
-static struct omap_hwmod dra7xx_mdio_hwmod = {
- .name = "davinci_mdio",
- .class = &dra7xx_mdio_hwmod_class,
- .clkdm_name = "gmac_clkdm",
- .main_clk = "dpll_gmac_ck",
-};
-
/*
* 'dcan' class
*
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_ocp_if dra7xx_l4_per2__cpgmac0 = {
- .master = &dra7xx_l4_per2_hwmod,
- .slave = &dra7xx_gmac_hwmod,
- .clk = "dpll_gmac_ck",
- .user = OCP_USER_MPU,
-};
-
-static struct omap_hwmod_ocp_if dra7xx_gmac__mdio = {
- .master = &dra7xx_gmac_hwmod,
- .slave = &dra7xx_mdio_hwmod,
- .user = OCP_USER_MPU,
-};
-
/* l4_wkup -> dcan1 */
static struct omap_hwmod_ocp_if dra7xx_l4_wkup__dcan1 = {
.master = &dra7xx_l4_wkup_hwmod,
&dra7xx_l4_wkup__ctrl_module_wkup,
&dra7xx_l4_wkup__dcan1,
&dra7xx_l4_per2__dcan2,
- &dra7xx_l4_per2__cpgmac0,
&dra7xx_l4_per2__mcasp1,
&dra7xx_l3_main_1__mcasp1,
&dra7xx_l4_per2__mcasp2,
&dra7xx_l4_per2__mcasp6,
&dra7xx_l4_per2__mcasp7,
&dra7xx_l4_per2__mcasp8,
- &dra7xx_gmac__mdio,
&dra7xx_l4_cfg__dma_system,
&dra7xx_l3_main_1__tpcc,
&dra7xx_l3_main_1__tptc0,