]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM64: dts: marvell: add NAND support on the CP110
authorGregory CLEMENT <gregory.clement@free-electrons.com>
Fri, 4 Aug 2017 15:32:32 +0000 (17:32 +0200)
committerGregory CLEMENT <gregory.clement@free-electrons.com>
Mon, 14 Aug 2017 14:28:58 +0000 (16:28 +0200)
The NAND controller used in A7K/A8K is present on the CP110. It is
compatible with the pxa-nand driver.

However, due to the limiation of the pins available this controller is
only usable on the CPM for A7K and on the CPS for A8K.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi

index 5586a732e1beafa025fb0d1b59a61ef1146b5a9d..8b019a9f4f59a81d316d983749093ab2dae6e9a5 100644 (file)
@@ -249,6 +249,21 @@ cpm_i2c1: i2c@701100 {
                                status = "disabled";
                        };
 
+                       cpm_nand: nand@720000 {
+                               /*
+                                * Due to the limiation of the pin available
+                                * this controller is only usable on the CPM
+                                * for A7K and on the CPS for A8K.
+                                */
+                               compatible = "marvell,armada370-nand";
+                               reg = <0x720000 0x54>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&cpm_clk 1 2>;
+                               status = "disabled";
+                       };
+
                        cpm_trng: trng@760000 {
                                compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
                                reg = <0x760000 0x7d>;
index 4be43f1f5aa220b4ea19b5d4d6a4f1736f071cf8..7c1100133731928f5b8653feb1f7738308ddbcce 100644 (file)
@@ -250,6 +250,21 @@ cps_i2c1: i2c@701100 {
                                status = "disabled";
                        };
 
+                       cps_nand: nand@720000 {
+                               /*
+                                * Due to the limiation of the pin available
+                                * this controller is only usable on the CPM
+                                * for A7K and on the CPS for A8K.
+                                */
+                               compatible = "marvell,armada370-nand";
+                               reg = <0x720000 0x54>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&cps_clk 1 2>;
+                               status = "disabled";
+                       };
+
                        cps_trng: trng@760000 {
                                compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
                                reg = <0x760000 0x7d>;