]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
dt-bindings: clock: imx7ulp: add HSRUN mode related clocks
authorAnson Huang <anson.huang@nxp.com>
Fri, 7 Dec 2018 10:03:29 +0000 (10:03 +0000)
committerStephen Boyd <sboyd@kernel.org>
Fri, 14 Dec 2018 22:03:11 +0000 (14:03 -0800)
There are HSRUN mode clock mux and divider in SCG1 module,
and SMC1 can control i.MX7ULP CPU to run in RUN mode or
HSRUN mode, the mode switch bits are actually a clock mux,
add these clocks for clock driver and dtb to use.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
include/dt-bindings/clock/imx7ulp-clock.h

index 008c5ee144c2e0459a2b3b0218db6506665a2b92..21d872e69cb1951daea477da8ecc5ef2dbbf3bfc 100644 (file)
 #define IMX7ULP_CLK_SOSC_BUS_CLK       41
 #define IMX7ULP_CLK_FIRC_BUS_CLK       42
 #define IMX7ULP_CLK_SPLL_BUS_CLK       43
+#define IMX7ULP_CLK_HSRUN_SYS_SEL      44
+#define IMX7ULP_CLK_HSRUN_CORE_DIV     45
 
-#define IMX7ULP_CLK_SCG1_END           44
+#define IMX7ULP_CLK_SCG1_END           46
 
 /* PCC2 */
 #define IMX7ULP_CLK_DMA1               0
 
 #define IMX7ULP_CLK_PCC3_END           16
 
+/* SMC1 */
+#define IMX7ULP_CLK_ARM                        0
+
+#define IMX7ULP_CLK_SMC1_END           1
+
 #endif /* __DT_BINDINGS_CLOCK_IMX7ULP_H */