]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
amdgpu/dc: make some audio functions return void
authorDave Airlie <airlied@redhat.com>
Fri, 29 Sep 2017 04:34:36 +0000 (14:34 +1000)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 29 Sep 2017 17:02:14 +0000 (13:02 -0400)
There is no need to check for these pointers being valid
at this level. Check earlier if required.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dce/dce_audio.c

index 198f4532e1007e6f0d669f3bb9fa1a5d084aba8a..6e940286c98d16f4b5c5411e5f58f452ddfd1022 100644 (file)
@@ -703,14 +703,11 @@ void dce_aud_az_configure(
 */
 
 /* search pixel clock value for Azalia HDMI Audio */
-static bool get_azalia_clock_info_hdmi(
+static void get_azalia_clock_info_hdmi(
        uint32_t crtc_pixel_clock_in_khz,
        uint32_t actual_pixel_clock_in_khz,
        struct azalia_clock_info *azalia_clock_info)
 {
-       if (azalia_clock_info == NULL)
-               return false;
-
        /* audio_dto_phase= 24 * 10,000;
         *   24MHz in [100Hz] units */
        azalia_clock_info->audio_dto_phase =
@@ -720,18 +717,13 @@ static bool get_azalia_clock_info_hdmi(
         *  [khz] -> [100Hz] */
        azalia_clock_info->audio_dto_module =
                        actual_pixel_clock_in_khz * 10;
-
-       return true;
 }
 
-static bool get_azalia_clock_info_dp(
+static void get_azalia_clock_info_dp(
        uint32_t requested_pixel_clock_in_khz,
        const struct audio_pll_info *pll_info,
        struct azalia_clock_info *azalia_clock_info)
 {
-       if (pll_info == NULL || azalia_clock_info == NULL)
-               return false;
-
        /* Reported dpDtoSourceClockInkhz value for
         * DCE8 already adjusted for SS, do not need any
         * adjustment here anymore
@@ -745,8 +737,6 @@ static bool get_azalia_clock_info_dp(
         *  [khz] ->[100Hz] */
        azalia_clock_info->audio_dto_module =
                pll_info->dp_dto_source_clock_in_khz * 10;
-
-       return true;
 }
 
 void dce_aud_wall_dto_setup(