]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
fpga: region: add compat_id support
authorWu Hao <hao.wu@intel.com>
Sat, 30 Jun 2018 00:53:12 +0000 (08:53 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 15 Jul 2018 11:55:44 +0000 (13:55 +0200)
This patch introduces a compat_id pointer member and sysfs interface
for each fpga region, similar as compat_id for fpga manager, it allows
applications to read the per region compat_id for compatibility
checking before other actions on this fpga-region (e.g. PR).

Signed-off-by: Wu Hao <hao.wu@intel.com>
Acked-by: Alan Tull <atull@kernel.org>
Acked-by: Moritz Fischer <mdf@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Documentation/ABI/testing/sysfs-class-fpga-region [new file with mode: 0644]
drivers/fpga/fpga-region.c
include/linux/fpga/fpga-region.h

diff --git a/Documentation/ABI/testing/sysfs-class-fpga-region b/Documentation/ABI/testing/sysfs-class-fpga-region
new file mode 100644 (file)
index 0000000..bc7ec64
--- /dev/null
@@ -0,0 +1,9 @@
+What:          /sys/class/fpga_region/<region>/compat_id
+Date:          June 2018
+KernelVersion: 4.19
+Contact:       Wu Hao <hao.wu@intel.com>
+Description:   FPGA region id for compatibility check, e.g. compatibility
+               of the FPGA reconfiguration hardware and image. This value
+               is defined or calculated by the layer that is creating the
+               FPGA region. This interface returns the compat_id value or
+               just error code -ENOENT in case compat_id is not used.
index 6d214d75c7be551f659ff52e5247a05330762e31..0d65220d5ec5b48fdc46186b2043c3797147cd9b 100644 (file)
@@ -158,6 +158,27 @@ int fpga_region_program_fpga(struct fpga_region *region)
 }
 EXPORT_SYMBOL_GPL(fpga_region_program_fpga);
 
+static ssize_t compat_id_show(struct device *dev,
+                             struct device_attribute *attr, char *buf)
+{
+       struct fpga_region *region = to_fpga_region(dev);
+
+       if (!region->compat_id)
+               return -ENOENT;
+
+       return sprintf(buf, "%016llx%016llx\n",
+                      (unsigned long long)region->compat_id->id_h,
+                      (unsigned long long)region->compat_id->id_l);
+}
+
+static DEVICE_ATTR_RO(compat_id);
+
+static struct attribute *fpga_region_attrs[] = {
+       &dev_attr_compat_id.attr,
+       NULL,
+};
+ATTRIBUTE_GROUPS(fpga_region);
+
 /**
  * fpga_region_create - alloc and init a struct fpga_region
  * @dev: device parent
@@ -258,6 +279,7 @@ static int __init fpga_region_init(void)
        if (IS_ERR(fpga_region_class))
                return PTR_ERR(fpga_region_class);
 
+       fpga_region_class->dev_groups = fpga_region_groups;
        fpga_region_class->dev_release = fpga_region_dev_release;
 
        return 0;
index d7071cddd72777e0370d11dfbee1b1d9d793ace0..0521b7f577a4808fcefa3a5ed6336428519341aa 100644 (file)
@@ -14,6 +14,7 @@
  * @bridge_list: list of FPGA bridges specified in region
  * @mgr: FPGA manager
  * @info: FPGA image info
+ * @compat_id: FPGA region id for compatibility check.
  * @priv: private data
  * @get_bridges: optional function to get bridges to a list
  */
@@ -23,6 +24,7 @@ struct fpga_region {
        struct list_head bridge_list;
        struct fpga_manager *mgr;
        struct fpga_image_info *info;
+       struct fpga_compat_id *compat_id;
        void *priv;
        int (*get_bridges)(struct fpga_region *region);
 };