drm/i915/gen11: fix the SAGV block time for gen11

It's 10us for gen 11.

Reviewed-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Reviewed-by: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180130134918.32283-7-paulo.r.zanoni@intel.com

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 766f4fdd633b8c1efecd6f2ec3d561171117203a..6dc4677e6c3f31c94efadc0c60195a86e4dae46f 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3694,11 +3694,18 @@ bool intel_can_enable_sagv(struct drm_atomic_state *state)
        struct intel_crtc_state *cstate;
        enum pipe pipe;
        int level, latency;
-       int sagv_block_time_us = IS_GEN9(dev_priv) ? 30 : 20;
+       int sagv_block_time_us;
 
        if (!intel_has_sagv(dev_priv))
                return false;
 
+       if (IS_GEN9(dev_priv))
+               sagv_block_time_us = 30;
+       else if (IS_GEN10(dev_priv))
+               sagv_block_time_us = 20;
+       else
+               sagv_block_time_us = 10;
+
        /*
         * SKL+ workaround: bspec recommends we disable the SAGV when we have
         * more then one pipe enabled