drm/amd/powerplay: add JPEG power control for Navi1x

By separating the JPEG power feature, and using its
own PowerUp and PowerDown messages

v2: remove PowerUpJpeg message argument

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index 14be350a612722d33bfb1d3448e4dea8dbe5ca07..95eeb44d0004a013f0d1f100e64b25418c1e077c 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -384,8 +384,10 @@ navi10_get_allowed_feature_mask(struct smu_context *smu,
                *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_ATHUB_PG_BIT);
 
        if (smu->adev->pg_flags & AMD_PG_SUPPORT_VCN)
-               *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VCN_PG_BIT)
-                               | FEATURE_MASK(FEATURE_JPEG_PG_BIT);
+               *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VCN_PG_BIT);
+
+       if (smu->adev->pg_flags & AMD_PG_SUPPORT_JPEG)
+               *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_JPEG_PG_BIT);
 
        /* disable DPM UCLK and DS SOCCLK on navi10 A0 secure board */
        if (is_asic_secure(smu)) {
@@ -665,6 +667,31 @@ static int navi10_dpm_set_uvd_enable(struct smu_context *smu, bool enable)
        return ret;
 }
 
+static int navi10_dpm_set_jpeg_enable(struct smu_context *smu, bool enable)
+{
+       struct smu_power_context *smu_power = &smu->smu_power;
+       struct smu_power_gate *power_gate = &smu_power->power_gate;
+       int ret = 0;
+
+       if (enable) {
+               if (smu_feature_is_enabled(smu, SMU_FEATURE_JPEG_PG_BIT)) {
+                       ret = smu_send_smc_msg(smu, SMU_MSG_PowerUpJpeg);
+                       if (ret)
+                               return ret;
+               }
+               power_gate->jpeg_gated = false;
+       } else {
+               if (smu_feature_is_enabled(smu, SMU_FEATURE_JPEG_PG_BIT)) {
+                       ret = smu_send_smc_msg(smu, SMU_MSG_PowerDownJpeg);
+                       if (ret)
+                               return ret;
+               }
+               power_gate->jpeg_gated = true;
+       }
+
+       return ret;
+}
+
 static int navi10_get_current_clk_freq_by_table(struct smu_context *smu,
                                       enum smu_clk_type clk_type,
                                       uint32_t *value)
@@ -1995,6 +2022,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {
        .get_allowed_feature_mask = navi10_get_allowed_feature_mask,
        .set_default_dpm_table = navi10_set_default_dpm_table,
        .dpm_set_uvd_enable = navi10_dpm_set_uvd_enable,
+       .dpm_set_jpeg_enable = navi10_dpm_set_jpeg_enable,
        .get_current_clk_freq_by_table = navi10_get_current_clk_freq_by_table,
        .print_clk_levels = navi10_print_clk_levels,
        .force_clk_levels = navi10_force_clk_levels,