]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: renesas: r8a77995: draak: enable EthernetAVB
authorYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Wed, 13 Sep 2017 12:18:39 +0000 (21:18 +0900)
committerSimon Horman <horms+renesas@verge.net.au>
Mon, 25 Sep 2017 07:05:19 +0000 (09:05 +0200)
This patch enables EthernetAVB for R-Car D3 draak board.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm64/boot/dts/renesas/r8a77995-draak.dts

index 7b776cb7e9289ef811a7b3749c9a51c813b2ee3f..96b7ff5cc321a45297b87be6819f73ecd3e93e48 100644 (file)
@@ -11,6 +11,7 @@
 
 /dts-v1/;
 #include "r8a77995.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
        model = "Renesas Draak board based on r8a77995";
@@ -18,6 +19,7 @@ / {
 
        aliases {
                serial0 = &scif2;
+               ethernet0 = &avb;
        };
 
        chosen {
@@ -37,6 +39,14 @@ &extal_clk {
 };
 
 &pfc {
+       avb0_pins: avb {
+               mux {
+                       groups = "avb0_link", "avb0_phy_int", "avb0_mdc",
+                                "avb0_mii";
+                       function = "avb0";
+               };
+       };
+
        scif2_pins: scif2 {
                groups = "scif2_data";
                function = "scif2";
@@ -56,6 +66,21 @@ &ohci0 {
        status = "okay";
 };
 
+&avb {
+       pinctrl-0 = <&avb0_pins>;
+       pinctrl-names = "default";
+       renesas,no-ether-link;
+       phy-handle = <&phy0>;
+       status = "okay";
+
+       phy0: ethernet-phy@0 {
+               rxc-skew-ps = <1500>;
+               reg = <0>;
+               interrupt-parent = <&gpio5>;
+               interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
+       };
+};
+
 &scif2 {
        pinctrl-0 = <&scif2_pins>;
        pinctrl-names = "default";