]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: stm32: add DCMI pins to stm32mp157c
authorHugues Fruchet <hugues.fruchet@st.com>
Thu, 28 Feb 2019 14:25:44 +0000 (15:25 +0100)
committerAlexandre Torgue <alexandre.torgue@st.com>
Tue, 21 May 2019 09:55:58 +0000 (11:55 +0200)
Add DCMI pins to stm32mp157c.

Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
arch/arm/boot/dts/stm32mp157-pinctrl.dtsi

index 4b5a778bdb624b5d5df2e86dd6f75d175aab4060..ed1382a077af5a291953d8ca970989d6e510feac 100644 (file)
@@ -189,6 +189,47 @@ pins {
                                };
                        };
 
+                       dcmi_pins_a: dcmi-0 {
+                               pins {
+                                       pinmux = <STM32_PINMUX('H', 8,  AF13)>,/* DCMI_HSYNC */
+                                                <STM32_PINMUX('B', 7,  AF13)>,/* DCMI_VSYNC */
+                                                <STM32_PINMUX('A', 6,  AF13)>,/* DCMI_PIXCLK */
+                                                <STM32_PINMUX('H', 9,  AF13)>,/* DCMI_D0 */
+                                                <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
+                                                <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
+                                                <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
+                                                <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
+                                                <STM32_PINMUX('I', 4,  AF13)>,/* DCMI_D5 */
+                                                <STM32_PINMUX('B', 8,  AF13)>,/* DCMI_D6 */
+                                                <STM32_PINMUX('E', 6,  AF13)>,/* DCMI_D7 */
+                                                <STM32_PINMUX('I', 1,  AF13)>,/* DCMI_D8 */
+                                                <STM32_PINMUX('H', 7,  AF13)>,/* DCMI_D9 */
+                                                <STM32_PINMUX('I', 3,  AF13)>,/* DCMI_D10 */
+                                                <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
+                                       bias-disable;
+                               };
+                       };
+
+                       dcmi_sleep_pins_a: dcmi-sleep-0 {
+                               pins {
+                                       pinmux = <STM32_PINMUX('H', 8,  ANALOG)>,/* DCMI_HSYNC */
+                                                <STM32_PINMUX('B', 7,  ANALOG)>,/* DCMI_VSYNC */
+                                                <STM32_PINMUX('A', 6,  ANALOG)>,/* DCMI_PIXCLK */
+                                                <STM32_PINMUX('H', 9,  ANALOG)>,/* DCMI_D0 */
+                                                <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
+                                                <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
+                                                <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
+                                                <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
+                                                <STM32_PINMUX('I', 4,  ANALOG)>,/* DCMI_D5 */
+                                                <STM32_PINMUX('B', 8,  ANALOG)>,/* DCMI_D6 */
+                                                <STM32_PINMUX('E', 6,  ANALOG)>,/* DCMI_D7 */
+                                                <STM32_PINMUX('I', 1,  ANALOG)>,/* DCMI_D8 */
+                                                <STM32_PINMUX('H', 7,  ANALOG)>,/* DCMI_D9 */
+                                                <STM32_PINMUX('I', 3,  ANALOG)>,/* DCMI_D10 */
+                                                <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
+                               };
+                       };
+
                        ethernet0_rgmii_pins_a: rgmii-0 {
                                pins1 {
                                        pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */