drm/sun4i: backend: Add support for zpos

Our various planes have a configurable zpos, that combined with the pipes
allow to configure the composition.

Since the interaction between the pipes, zpos and alphas framebuffers is
not trivial, let's just enable the zpos as an immutable property for now,
and use that zpos in our atomic_update part.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Link: https://patchwork.freedesktop.org/patch/msgid/b006853e908bd06661c5bc1f2191121523bce0e4.1516617243.git-series.maxime.ripard@free-electrons.com

diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c b/drivers/gpu/drm/sun4i/sun4i_backend.c
index caecae4ca7c49a58a0904d607d338a65172042e0..0cbe9f066f0cca5f695f69f82f9bc0bb67ffabef 100644 (file)
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -271,6 +271,21 @@ int sun4i_backend_update_layer_buffer(struct sun4i_backend *backend,
        return 0;
 }
 
+int sun4i_backend_update_layer_zpos(struct sun4i_backend *backend, int layer,
+                                   struct drm_plane *plane)
+{
+       struct drm_plane_state *state = plane->state;
+       unsigned int priority = state->normalized_zpos;
+
+       DRM_DEBUG_DRIVER("Setting layer %d's priority to %d\n", layer, priority);
+
+       regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_ATTCTL_REG0(layer),
+                          SUN4I_BACKEND_ATTCTL_REG0_LAY_PRISEL_MASK,
+                          SUN4I_BACKEND_ATTCTL_REG0_LAY_PRISEL(priority));
+
+       return 0;
+}
+
 static bool sun4i_backend_plane_uses_scaler(struct drm_plane_state *state)
 {
        u16 src_h = state->src_h >> 16;

diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.h b/drivers/gpu/drm/sun4i/sun4i_backend.h
index 1ca8b7db6807ceffa4ea22c6c46b1cbc863be995..04a4f11b87a8a9b95f217620576488b47979a5f3 100644 (file)
--- a/drivers/gpu/drm/sun4i/sun4i_backend.h
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.h
@@ -182,5 +182,7 @@ int sun4i_backend_update_layer_buffer(struct sun4i_backend *backend,
                                      int layer, struct drm_plane *plane);
 int sun4i_backend_update_layer_frontend(struct sun4i_backend *backend,
                                        int layer, uint32_t in_fmt);
+int sun4i_backend_update_layer_zpos(struct sun4i_backend *backend,
+                                   int layer, struct drm_plane *plane);
 
 #endif /* _SUN4I_BACKEND_H_ */

diff --git a/drivers/gpu/drm/sun4i/sun4i_framebuffer.c b/drivers/gpu/drm/sun4i/sun4i_framebuffer.c
index 973ee1fc95c900ac896f1a5c7f3eb60e1f122b74..5f29850ef8acf4318772ec0fa791670884dca1ea 100644 (file)
--- a/drivers/gpu/drm/sun4i/sun4i_framebuffer.c
+++ b/drivers/gpu/drm/sun4i/sun4i_framebuffer.c
@@ -29,6 +29,10 @@ static int sun4i_de_atomic_check(struct drm_device *dev,
        if (ret)
                return ret;
 
+       ret = drm_atomic_normalize_zpos(dev, state);
+       if (ret)
+               return ret;
+
        return drm_atomic_helper_check_planes(dev, state);
 }
 

diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c b/drivers/gpu/drm/sun4i/sun4i_layer.c
index 03549646528a8441e75ac2309781afba07f0bf31..fbf25d59cf8876309ac5b8869f74c5a139b63fba 100644 (file)
--- a/drivers/gpu/drm/sun4i/sun4i_layer.c
+++ b/drivers/gpu/drm/sun4i/sun4i_layer.c
@@ -115,6 +115,7 @@ static void sun4i_backend_layer_atomic_update(struct drm_plane *plane,
        }
 
        sun4i_backend_update_layer_coord(backend, layer->id, plane);
+       sun4i_backend_update_layer_zpos(backend, layer->id, plane);
        sun4i_backend_layer_enable(backend, layer->id, true);
 }
 
@@ -237,6 +238,8 @@ struct drm_plane **sun4i_layers_init(struct drm_device *drm,
                        return ERR_CAST(layer);
                };
 
+               drm_plane_create_zpos_immutable_property(&layer->plane, i);
+
                DRM_DEBUG_DRIVER("Assigning %s plane to pipe %d\n",
                                 i ? "overlay" : "primary", plane->pipe);
                regmap_update_bits(engine->regs, SUN4I_BACKEND_ATTCTL_REG0(i),