drm/i915: Drop intel_update_sprite_watermarks

The only platform that still has an update_sprite_wm entrypoint is SKL;
on SKL, intel_update_sprite_watermarks just updates intel_plane->wm and
then performs a regular watermark update.  However intel_plane->wm is
only used to update a couple fields in intel_wm_config, and those fields
are never used by the SKL code, so on SKL an update_sprite_wm is
effectively identical to an update_wm call.  Since we're already
ensuring that the regular intel_update_wm is called any time we'd try to
call intel_update_sprite_watermarks, the whole call is redundant and can
be dropped.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 29ce11fc2408aff337d0a6cbfac377414e5943ee..268abbcd6c8c6c2d56a96f41f3c88f0cc000fc95 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -628,10 +628,6 @@ struct drm_i915_display_funcs {
                          struct dpll *match_clock,
                          struct dpll *best_clock);
        void (*update_wm)(struct drm_crtc *crtc);
-       void (*update_sprite_wm)(struct drm_plane *plane,
-                                struct drm_crtc *crtc,
-                                uint32_t sprite_width, uint32_t sprite_height,
-                                int pixel_size, bool enable, bool scaled);
        int (*modeset_calc_cdclk)(struct drm_atomic_state *state);
        void (*modeset_commit_cdclk)(struct drm_atomic_state *state);
        /* Returns the active state of the crtc, and if the crtc is active,

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index d3dab99f322068efc84b96b52c80b4af64d86587..da894dba56ddc88c51074f59fa3736c774d80466 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4805,7 +4805,6 @@ static void intel_post_plane_update(struct intel_crtc *crtc)
        struct intel_crtc_atomic_commit *atomic = &crtc->atomic;
        struct drm_device *dev = crtc->base.dev;
        struct drm_i915_private *dev_priv = dev->dev_private;
-       struct drm_plane *plane;
 
        if (atomic->wait_vblank)
                intel_wait_for_vblank(dev, crtc->pipe);
@@ -4824,10 +4823,6 @@ static void intel_post_plane_update(struct intel_crtc *crtc)
        if (atomic->post_enable_primary)
                intel_post_enable_primary(&crtc->base);
 
-       drm_for_each_plane_mask(plane, dev, atomic->update_sprite_watermarks)
-               intel_update_sprite_watermarks(plane, &crtc->base,
-                                              0, 0, 0, false, false);
-
        memset(atomic, 0, sizeof(*atomic));
 }
 

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index d6d7ac73f64584e6ac88298042abaa2cedc77d75..9431a12c42043aab59f682fd0c7f4b70788b6cdf 100644 (file)
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1398,12 +1398,6 @@ void intel_init_clock_gating(struct drm_device *dev);
 void intel_suspend_hw(struct drm_device *dev);
 int ilk_wm_max_level(const struct drm_device *dev);
 void intel_update_watermarks(struct drm_crtc *crtc);
-void intel_update_sprite_watermarks(struct drm_plane *plane,
-                                   struct drm_crtc *crtc,
-                                   uint32_t sprite_width,
-                                   uint32_t sprite_height,
-                                   int pixel_size,
-                                   bool enabled, bool scaled);
 void intel_init_pm(struct drm_device *dev);
 void intel_pm_setup(struct drm_device *dev);
 void intel_gpu_ips_init(struct drm_i915_private *dev_priv);

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index b8c3e22061912967d67625537a8fae0a1f8b09dd..6de3ef36754b830307fb2a788871254a1e998d80 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3148,18 +3148,9 @@ static void skl_compute_wm_global_parameters(struct drm_device *dev,
                                             struct intel_wm_config *config)
 {
        struct drm_crtc *crtc;
-       struct drm_plane *plane;
 
        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
                config->num_pipes_active += to_intel_crtc(crtc)->active;
-
-       /* FIXME: I don't think we need those two global parameters on SKL */
-       list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
-               struct intel_plane *intel_plane = to_intel_plane(plane);
-
-               config->sprites_enabled |= intel_plane->wm.enabled;
-               config->sprites_scaled |= intel_plane->wm.scaled;
-       }
 }
 
 static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
@@ -3682,39 +3673,6 @@ static void skl_update_wm(struct drm_crtc *crtc)
        dev_priv->wm.skl_hw = *results;
 }
 
-static void
-skl_update_sprite_wm(struct drm_plane *plane, struct drm_crtc *crtc,
-                    uint32_t sprite_width, uint32_t sprite_height,
-                    int pixel_size, bool enabled, bool scaled)
-{
-       struct intel_plane *intel_plane = to_intel_plane(plane);
-       struct drm_framebuffer *fb = plane->state->fb;
-
-       intel_plane->wm.enabled = enabled;
-       intel_plane->wm.scaled = scaled;
-       intel_plane->wm.horiz_pixels = sprite_width;
-       intel_plane->wm.vert_pixels = sprite_height;
-       intel_plane->wm.tiling = DRM_FORMAT_MOD_NONE;
-
-       /* For planar: Bpp is for UV plane, y_Bpp is for Y plane */
-       intel_plane->wm.bytes_per_pixel =
-               (fb && fb->pixel_format == DRM_FORMAT_NV12) ?
-               drm_format_plane_cpp(plane->state->fb->pixel_format, 1) : pixel_size;
-       intel_plane->wm.y_bytes_per_pixel =
-               (fb && fb->pixel_format == DRM_FORMAT_NV12) ?
-               drm_format_plane_cpp(plane->state->fb->pixel_format, 0) : 0;
-
-       /*
-        * Framebuffer can be NULL on plane disable, but it does not
-        * matter for watermarks if we assume no tiling in that case.
-        */
-       if (fb)
-               intel_plane->wm.tiling = fb->modifier[0];
-       intel_plane->wm.rotation = plane->state->rotation;
-
-       skl_update_wm(crtc);
-}
-
 static void ilk_update_wm(struct drm_crtc *crtc)
 {
        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
@@ -4150,21 +4108,6 @@ void intel_update_watermarks(struct drm_crtc *crtc)
                dev_priv->display.update_wm(crtc);
 }
 
-void intel_update_sprite_watermarks(struct drm_plane *plane,
-                                   struct drm_crtc *crtc,
-                                   uint32_t sprite_width,
-                                   uint32_t sprite_height,
-                                   int pixel_size,
-                                   bool enabled, bool scaled)
-{
-       struct drm_i915_private *dev_priv = plane->dev->dev_private;
-
-       if (dev_priv->display.update_sprite_wm)
-               dev_priv->display.update_sprite_wm(plane, crtc,
-                                                  sprite_width, sprite_height,
-                                                  pixel_size, enabled, scaled);
-}
-
 /**
  * Lock protecting IPS related data structures
  */
@@ -7089,7 +7032,6 @@ void intel_init_pm(struct drm_device *dev)
                        dev_priv->display.init_clock_gating =
                                skl_init_clock_gating;
                dev_priv->display.update_wm = skl_update_wm;
-               dev_priv->display.update_sprite_wm = skl_update_sprite_wm;
        } else if (HAS_PCH_SPLIT(dev)) {
                ilk_setup_wm_latency(dev);
 

diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index b229c6752671745e84a7a32b1f43e1fc33ebc89d..dd2d5683fcb166df3bbae2d82f6a74ea530d6391 100644 (file)
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -192,7 +192,6 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc,
        const int pipe = intel_plane->pipe;
        const int plane = intel_plane->plane + 1;
        u32 plane_ctl, stride_div, stride;
-       int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
        const struct drm_intel_sprite_colorkey *key =
                &to_intel_plane_state(drm_plane->state)->ckey;
        unsigned long surf_addr;
@@ -211,10 +210,6 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc,
        rotation = drm_plane->state->rotation;
        plane_ctl |= skl_plane_ctl_rotation(rotation);
 
-       intel_update_sprite_watermarks(drm_plane, crtc, src_w, src_h,
-                                      pixel_size, true,
-                                      src_w != crtc_w || src_h != crtc_h);
-
        stride_div = intel_fb_stride_alignment(dev, fb->modifier[0],
                                               fb->pixel_format);
 
@@ -296,8 +291,6 @@ skl_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc)
 
        I915_WRITE(PLANE_SURF(pipe, plane), 0);
        POSTING_READ(PLANE_SURF(pipe, plane));
-
-       intel_update_sprite_watermarks(dplane, crtc, 0, 0, 0, false, false);
 }
 
 static void
@@ -540,10 +533,6 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
        if (IS_HASWELL(dev) || IS_BROADWELL(dev))
                sprctl |= SPRITE_PIPE_CSC_ENABLE;
 
-       intel_update_sprite_watermarks(plane, crtc, src_w, src_h, pixel_size,
-                                      true,
-                                      src_w != crtc_w || src_h != crtc_h);
-
        /* Sizes are 0 based */
        src_w--;
        src_h--;
@@ -677,10 +666,6 @@ ilk_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
        if (IS_GEN6(dev))
                dvscntr |= DVS_TRICKLE_FEED_DISABLE; /* must disable */
 
-       intel_update_sprite_watermarks(plane, crtc, src_w, src_h,
-                                      pixel_size, true,
-                                      src_w != crtc_w || src_h != crtc_h);
-
        /* Sizes are 0 based */
        src_w--;
        src_h--;