ARM: ux500: add SCU and WD to device tree

The Ux500 like other Cortex-A9 SoC's has a Snoop Control
Unit (SCU) and a Watchdog in the same address range as
the local timers. Add these to the SoC device tree.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index 5b876f263af492e1c9e031ba0a6fc23cfaebdc21..f024a1c0de8b57b42de5ec96cad452f39aae23e2 100644 (file)
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -185,6 +185,11 @@ intc: interrupt-controller@a0411000 {
                              <0xa0410100 0x100>;
                };
 
+               scu@a04100000 {
+                       compatible = "arm,cortex-a9-scu";
+                       reg = <0xa0410000 0x100>;
+               };
+
                L2: l2-cache {
                        compatible = "arm,pl310-cache";
                        reg = <0xa0412000 0x1000>;
@@ -245,6 +250,13 @@ timer@a0410600 {
                        clocks = <&smp_twd_clk>;
                };
 
+               watchdog@a0410620 {
+                       compatible = "arm,cortex-a9-twd-wdt";
+                       reg = <0xa0410620 0x20>;
+                       interrupts = <1 14 0x304>;
+                       clocks = <&smp_twd_clk>;
+               };
+
                rtc@80154000 {
                        compatible = "arm,rtc-pl031", "arm,primecell";
                        reg = <0x80154000 0x1000>;