ARM: dts: sunxi: h3/h5: Add r_i2c pinmux node

H3/H5 SoCs contain an I2C controller optionally available
on the PL0 and PL1 pins. This patch adds pinmux configuration
for this controller.

Signed-off-by: Ondrej Jirman <megous@megous.com>
[Icenowy: change commit message, node name and function name]
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 1be1a02d6df26b5a963418a50b15a9bea4880004..92b8fa96e73741029668009e52bec4bcae9de3cf 100644 (file)
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -837,6 +837,11 @@ ir_pins_a: ir {
                                pins = "PL11";
                                function = "s_cir_rx";
                        };
+
+                       r_i2c_pins: r-i2c {
+                               pins = "PL0", "PL1";
+                               function = "s_i2c";
+                       };
                };
        };
 };