]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/tegra: sor: Implement pad clock for all SOR instances
authorThierry Reding <treding@nvidia.com>
Mon, 24 Jun 2019 15:06:34 +0000 (17:06 +0200)
committerThierry Reding <treding@nvidia.com>
Mon, 28 Oct 2019 10:18:55 +0000 (11:18 +0100)
So far the pad clock was only needed on the second SOR instance. The
clock does exist for all SOR instances, though, so make sure it is
always implemented. This prepares for further unification of the code
in subsequent patches.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/gpu/drm/tegra/sor.c

index c7faf088cabc9dd3a210c6b4f0db56d686c7d5c8..71a7ed57cb4f2bf980e909da591cbd523dcf5cad 100644 (file)
@@ -522,8 +522,9 @@ static inline struct tegra_clk_sor_pad *to_pad(struct clk_hw *hw)
        return container_of(hw, struct tegra_clk_sor_pad, hw);
 }
 
-static const char * const tegra_clk_sor_pad_parents[] = {
-       "pll_d2_out0", "pll_dp"
+static const char * const tegra_clk_sor_pad_parents[2][2] = {
+       { "pll_d_out0", "pll_dp" },
+       { "pll_d2_out0", "pll_dp" },
 };
 
 static int tegra_clk_sor_pad_set_parent(struct clk_hw *hw, u8 index)
@@ -594,8 +595,8 @@ static struct clk *tegra_clk_sor_pad_register(struct tegra_sor *sor,
 
        init.name = name;
        init.flags = 0;
-       init.parent_names = tegra_clk_sor_pad_parents;
-       init.num_parents = ARRAY_SIZE(tegra_clk_sor_pad_parents);
+       init.parent_names = tegra_clk_sor_pad_parents[sor->index];
+       init.num_parents = ARRAY_SIZE(tegra_clk_sor_pad_parents[sor->index]);
        init.ops = &tegra_clk_sor_pad_ops;
 
        pad->hw.init = &init;
@@ -4016,6 +4017,8 @@ static int tegra_sor_probe(struct platform_device *pdev)
         * pad output clock.
         */
        if (!sor->clk_pad) {
+               char *name;
+
                err = pm_runtime_get_sync(&pdev->dev);
                if (err < 0) {
                        dev_err(&pdev->dev, "failed to get runtime PM: %d\n",
@@ -4023,8 +4026,13 @@ static int tegra_sor_probe(struct platform_device *pdev)
                        goto remove;
                }
 
-               sor->clk_pad = tegra_clk_sor_pad_register(sor,
-                                                         "sor1_pad_clkout");
+               name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "sor%u_pad_clkout", sor->index);
+               if (!name) {
+                       err = -ENOMEM;
+                       goto remove;
+               }
+
+               sor->clk_pad = tegra_clk_sor_pad_register(sor, name);
                pm_runtime_put(&pdev->dev);
        }