ARM: dts: lpc32xx: disable MAC controller by default

NXP LPC3220 and LPC3230 SoCs do NOT contain a MAC controller, so,
since for now there is just one dtsi file for all variants of
NXP LPC32xx SoCs, it is reasonable to disable the controller
by default and enable it in device tree files of particular boards.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>

diff --git a/arch/arm/boot/dts/lpc3250-ea3250.dts b/arch/arm/boot/dts/lpc3250-ea3250.dts
index f46a11827ef6cd1c270c115855e2ad72005898ba..4adf4c96f79815cfd98ff30e6ab6ba41faace934 100644 (file)
--- a/arch/arm/boot/dts/lpc3250-ea3250.dts
+++ b/arch/arm/boot/dts/lpc3250-ea3250.dts
@@ -201,6 +201,7 @@ isp1301: usb-transceiver@2d {
 &mac {
        phy-mode = "rmii";
        use-iram;
+       status = "okay";
 };
 
 /* Here, choose exactly one from: ohci, usbd */

diff --git a/arch/arm/boot/dts/lpc3250-phy3250.dts b/arch/arm/boot/dts/lpc3250-phy3250.dts
index ebd19258e22b57a0654993e7534598d3da57a124..b99726d278f620f9f4a2b4807bf0c11efc6bc7b2 100644 (file)
--- a/arch/arm/boot/dts/lpc3250-phy3250.dts
+++ b/arch/arm/boot/dts/lpc3250-phy3250.dts
@@ -134,6 +134,7 @@ &key {
 &mac {
        phy-mode = "rmii";
        use-iram;
+       status = "okay";
 };
 
 /* Here, choose exactly one from: ohci, usbd */

diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
index aa1d9dd248fd8a8943cd59153288113a78168d52..a0fedab579b429a7f38643190984941be22f9f68 100644 (file)
--- a/arch/arm/boot/dts/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/lpc32xx.dtsi
@@ -153,6 +153,7 @@ mac: ethernet@31060000 {
                        reg = <0x31060000 0x1000>;
                        interrupts = <29 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clk LPC32XX_CLK_MAC>;
+                       status = "disabled";
                };
 
                emc: memory-controller@31080000 {