]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/i915/psr: Set DPCD PSR2 enable bit when needed
authorJosé Roberto de Souza <jose.souza@intel.com>
Wed, 28 Mar 2018 22:30:45 +0000 (15:30 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Fri, 30 Mar 2018 17:18:11 +0000 (10:18 -0700)
In the 2 eDP1.4a pannels tested set or not set bit have no effect
but is better set it and comply with specification.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180328223046.16125-9-jose.souza@intel.com
drivers/gpu/drm/i915/intel_psr.c

index d079cf0b034c783dbc61aa2e707a57f1fea89414..2d53f7398a6d9c861f127792682aa527745613e2 100644 (file)
@@ -278,18 +278,19 @@ static void hsw_psr_enable_sink(struct intel_dp *intel_dp)
        struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
        struct drm_device *dev = dig_port->base.base.dev;
        struct drm_i915_private *dev_priv = to_i915(dev);
+       u8 dpcd_val = DP_PSR_ENABLE;
 
        /* Enable ALPM at sink for psr2 */
        if (dev_priv->psr.psr2_enabled && dev_priv->psr.alpm)
                drm_dp_dpcd_writeb(&intel_dp->aux,
                                DP_RECEIVER_ALPM_CONFIG,
                                DP_ALPM_ENABLE);
+
+       if (dev_priv->psr.psr2_enabled)
+               dpcd_val |= DP_PSR_ENABLE_PSR2;
        if (dev_priv->psr.link_standby)
-               drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG,
-                                  DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE);
-       else
-               drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG,
-                                  DP_PSR_ENABLE);
+               dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
+       drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, dpcd_val);
 
        drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
 }