]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: meson8b: the CBUS GPIO controller only has 83 GPIOs
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Mon, 12 Mar 2018 20:57:09 +0000 (21:57 +0100)
committerKevin Hilman <khilman@baylibre.com>
Tue, 20 Mar 2018 21:32:31 +0000 (14:32 -0700)
Update the "gpio-ranges" property of the CBUS GPIO controller on Meson8b
because it only provides 83 GPIOs.
The GPIO definitions in include/dt-bindings/gpio/meson8b-gpio.h
inherited all GPIOs from Meson8 until recently. However, Meson8b does
not support all GPIOs which are supported by Meson8 (Meson8b doesn't
have a GPIOZ bank, most of the pins from the GPIODV bank are missing on
Meson8b - just to name a few differences).

The actual number of GPIOs is only 83, instead of 120 from Meson8 plus
the 10 GPIOs from the DIF bank on Meson8b.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arch/arm/boot/dts/meson8b.dtsi

index f9eceab4e3db90c2a541698d5894d20ae285c871..553b82174604eb207c1d877553ef8600e2229c0f 100644 (file)
@@ -183,7 +183,7 @@ gpio: banks@80b0 {
                        reg-names = "mux", "pull", "pull-enable", "gpio";
                        gpio-controller;
                        #gpio-cells = <2>;
-                       gpio-ranges = <&pinctrl_cbus 0 0 130>;
+                       gpio-ranges = <&pinctrl_cbus 0 0 83>;
                };
 
                eth_rgmii_pins: eth-rgmii {