drm/i915/spt+: Don't reset invalid AUX channel interrupt bits in SDEIMR

The SDE interrupt bits 25, 26 and 27 are either reserved or meant for
DDI E hotplug in SPT+. These bits are meant for AUX channels only in LPT
and CPT, so add the appropriate checks.

Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170909004255.14827-1-dhinakaran.pandiyan@intel.com

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 5d391e6890708544b97c6af0eab5a476088e8d27..91a2c5dbf2daa4b0d04cec73ff5f3457ad996ac6 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3241,8 +3241,10 @@ static void ibx_irq_postinstall(struct drm_device *dev)
 
        if (HAS_PCH_IBX(dev_priv))
                mask = SDE_GMBUS | SDE_AUX_MASK | SDE_POISON;
-       else
+       else if (HAS_PCH_CPT(dev_priv) || HAS_PCH_LPT(dev_priv))
                mask = SDE_GMBUS_CPT | SDE_AUX_MASK_CPT;
+       else
+               mask = SDE_GMBUS_CPT;
 
        gen5_assert_iir_is_zero(dev_priv, SDEIIR);
        I915_WRITE(SDEIMR, ~mask);