]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
net: hns3: do not request reset when hardware resetting
authorHuazhong Tan <tanhuazhong@huawei.com>
Sat, 6 Apr 2019 07:43:31 +0000 (15:43 +0800)
committerDavid S. Miller <davem@davemloft.net>
Mon, 8 Apr 2019 22:30:49 +0000 (15:30 -0700)
When hardware reset does not finish, the driver should not
request a new reset, otherwise the ongoing hardware reset
will get problem.

Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

index 6e8fa2e0b5ea0a26bfdf7d596e165c5ea09723f9..1c93da2bcb4bdb3491928acf92061732b6dd1415 100644 (file)
@@ -32,6 +32,7 @@
 static int hclge_set_mac_mtu(struct hclge_dev *hdev, int new_mps);
 static int hclge_init_vlan_config(struct hclge_dev *hdev);
 static int hclge_reset_ae_dev(struct hnae3_ae_dev *ae_dev);
+static bool hclge_get_hw_reset_stat(struct hnae3_handle *handle);
 static int hclge_set_umv_space(struct hclge_dev *hdev, u16 space_size,
                               u16 *allocated_size, bool is_alloc);
 
@@ -2714,9 +2715,18 @@ int hclge_func_reset_cmd(struct hclge_dev *hdev, int func_id)
 
 static void hclge_do_reset(struct hclge_dev *hdev)
 {
+       struct hnae3_handle *handle = &hdev->vport[0].nic;
        struct pci_dev *pdev = hdev->pdev;
        u32 val;
 
+       if (hclge_get_hw_reset_stat(handle)) {
+               dev_info(&pdev->dev, "Hardware reset not finish\n");
+               dev_info(&pdev->dev, "func_rst_reg:0x%x, global_rst_reg:0x%x\n",
+                        hclge_read_dev(&hdev->hw, HCLGE_FUN_RST_ING),
+                        hclge_read_dev(&hdev->hw, HCLGE_GLOBAL_RESET_REG));
+               return;
+       }
+
        switch (hdev->reset_type) {
        case HNAE3_GLOBAL_RESET:
                val = hclge_read_dev(&hdev->hw, HCLGE_GLOBAL_RESET_REG);