SRI(SCL_UPDATE, SCL, id), \
SRI(SCL_F_SHARP_CONTROL, SCL, id)
+#define XFM_COMMON_REG_LIST_DCE80(id) \
+ XFM_COMMON_REG_LIST_DCE_BASE(id), \
+ SRI(DCFE_MEM_LIGHT_SLEEP_CNTL, CRTC, id)
+
#define XFM_COMMON_REG_LIST_DCE100(id) \
XFM_COMMON_REG_LIST_DCE_BASE(id), \
SRI(DCFE_MEM_PWR_CTRL, CRTC, id), \
XFM_SF(SCL_UPDATE, SCL_COEF_UPDATE_COMPLETE, mask_sh), \
XFM_SF(LB_DATA_FORMAT, ALPHA_EN, mask_sh)
+#define XFM_COMMON_MASK_SH_LIST_DCE80(mask_sh) \
+ XFM_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(mask_sh), \
+ OPP_SF(DCFE_MEM_LIGHT_SLEEP_CNTL, REGAMMA_LUT_LIGHT_SLEEP_DIS, mask_sh),\
+ OPP_SF(DCFE_MEM_LIGHT_SLEEP_CNTL, DCP_LUT_LIGHT_SLEEP_DIS, mask_sh),\
+ OPP_SF(DCFE_MEM_LIGHT_SLEEP_CNTL, REGAMMA_LUT_MEM_PWR_STATE, mask_sh)
+
#define XFM_COMMON_MASK_SH_LIST_DCE110(mask_sh) \
XFM_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(mask_sh), \
XFM_SF(DCFE_MEM_PWR_CTRL, SCL_COEFF_MEM_PWR_DIS, mask_sh), \
#define transform_regs(id)\
[id] = {\
- XFM_COMMON_REG_LIST_DCE_BASE(id)\
+ XFM_COMMON_REG_LIST_DCE80(id)\
}
static const struct dce_transform_registers xfm_regs[] = {
};
static const struct dce_transform_shift xfm_shift = {
- XFM_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(__SHIFT)
+ XFM_COMMON_MASK_SH_LIST_DCE80(__SHIFT)
};
static const struct dce_transform_mask xfm_mask = {
- XFM_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(_MASK)
+ XFM_COMMON_MASK_SH_LIST_DCE80(_MASK)
};
#define aux_regs(id)\