]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/amd/display: Fix number of slices not being checked for dsc
authorNikola Cornij <nikola.cornij@amd.com>
Tue, 6 Aug 2019 17:23:17 +0000 (13:23 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 23 Aug 2019 16:42:32 +0000 (11:42 -0500)
[why]
num_slices_h was not being checked

[How]
Fix the typo and check num_slices_h

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c

index c4f861e6bd537f09ee7093a41563af01039bb7a9..1b419407af942b57aa9e0f2b0b05f2b3597a86db 100644 (file)
@@ -322,7 +322,7 @@ static bool dsc_prepare_config(const struct dsc_config *dsc_cfg, struct dsc_reg_
                    dsc_cfg->dc_dsc_cfg.linebuf_depth == 0)));
        ASSERT(96 <= dsc_cfg->dc_dsc_cfg.bits_per_pixel && dsc_cfg->dc_dsc_cfg.bits_per_pixel <= 0x3ff); // 6.0 <= bits_per_pixel <= 63.9375
 
-       if (!dsc_cfg->dc_dsc_cfg.num_slices_v || !dsc_cfg->dc_dsc_cfg.num_slices_v ||
+       if (!dsc_cfg->dc_dsc_cfg.num_slices_v || !dsc_cfg->dc_dsc_cfg.num_slices_h ||
                !(dsc_cfg->dc_dsc_cfg.version_minor == 1 || dsc_cfg->dc_dsc_cfg.version_minor == 2) ||
                !dsc_cfg->pic_width || !dsc_cfg->pic_height ||
                !((dsc_cfg->dc_dsc_cfg.version_minor == 1 && // v1.1 line buffer depth range: