ARM: dts: meson8b: odroidc1: add the CPU voltage regulator

The CPU voltage regulator is a "Monolithic Power Systems MP2161"
(according to the Odroid-C1+'s schematics). It is driven by PWM_C on
GPIODV_9.

Hardkernel's 3.10 kernel (based on the Amlogic GPL kernel sources)
defines a PWM voltage table with the following values:
- 0.86 volts = PWM register value 0x10f001b
- (more values in 0.1 volt increments)
- 1.14 volts = PWM register value 0x000012a
When using the XTAL (24MHz) as input this translates into a PWM period
of 12218ns with 0.86V using a duty cycle of 91% and 1.14V using a duty
cycle of 0%.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
index ef3177d3da3dc85d5cb2d2d786a59d368c4189cd..0557823cdd64a33dd1c4c1e36bc9690b78ffa0f3 100644 (file)
--- a/arch/arm/boot/dts/meson8b-odroidc1.dts
+++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
@@ -101,6 +101,25 @@ tf_io: gpio-regulator-tf_io {
                states = <3300000 0
                          1800000 1>;
        };
+
+       vcck: regulator-vcck {
+               /* Monolithic Power Systems MP2161 */
+               compatible = "pwm-regulator";
+
+               regulator-name = "VCCK";
+               regulator-min-microvolt = <860000>;
+               regulator-max-microvolt = <1140000>;
+
+               pwms = <&pwm_cd 0 12218 0>;
+               pwm-dutycycle-range = <91 0>;
+
+               regulator-boot-on;
+               regulator-always-on;
+       };
+};
+
+&cpu0 {
+       cpu-supply = <&vcck>;
 };
 
 &ethmac {
@@ -180,6 +199,14 @@ sd_card_slot: slot@1 {
        };
 };
 
+&pwm_cd {
+       status = "okay";
+       pinctrl-0 = <&pwm_c1_pins>;
+       pinctrl-names = "default";
+       clocks = <&clkc CLKID_XTAL>;
+       clock-names = "clkin0";
+};
+
 &uart_AO {
        status = "okay";
        pinctrl-0 = <&uart_ao_a_pins>;