]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: i.MX51: imx51-digi-connectcore: Enable ESDHC1
authorAlexander Shiyan <shc_work@mail.ru>
Sun, 23 Dec 2018 06:03:41 +0000 (09:03 +0300)
committerShawn Guo <shawnguo@kernel.org>
Sat, 12 Jan 2019 03:05:30 +0000 (11:05 +0800)
This patch adds definitions for ESDHC1 for Digi Connectore SOM & JSK.
This interface can be used to boot a module.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts
arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi

index a5010e9e343bbe4c264d6996adc4bb662ebbc0fd..a2eea58510dc0813ae27ea11cc8a0ebc70016ed3 100644 (file)
@@ -21,6 +21,10 @@ chosen {
        };
 };
 
+&esdhc1 {
+       status = "okay";
+};
+
 &owire {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_owire>;
index e9421b851ad5e322f1718f3255680ecbfd152d04..a2a6408203e3ec9464c717379ee3511d30b2ca6b 100644 (file)
@@ -145,6 +145,13 @@ pwgt2spi_reg: pwgt2spi {
        };
 };
 
+&esdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc1>;
+       max-frequency = <50000000>;
+       bus-width = <1>;
+};
+
 &esdhc2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_esdhc2>;
@@ -234,6 +241,14 @@ MX51_PAD_CSPI1_SS0__GPIO4_24               0x85 /* CS0 */
                        >;
                };
 
+               pinctrl_esdhc1: esdhc1grp {
+                       fsl,pins = <
+                               MX51_PAD_SD1_CLK__SD1_CLK               0x400021d5
+                               MX51_PAD_SD1_CMD__SD1_CMD               0x400020d5
+                               MX51_PAD_SD1_DATA0__SD1_DATA0           0x400020d5
+                       >;
+               };
+
                pinctrl_esdhc2: esdhc2grp {
                        fsl,pins = <
                                MX51_PAD_SD2_CMD__SD2_CMD               0x400020d5