arm64: dts: ls1088a: add cpu idle support

ls1088a supports another cpu idle state which is ph20 which saves
more power when cpu is idle.
It was implemented through psci firmware.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index 6c22d75bc504a3eaf011ab1a5e018f6db6ee0da9..33797b3736744bbeee590014a3342b514758a0b8 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -66,6 +66,7 @@ cpu0: cpu@0 {
                        compatible = "arm,cortex-a53";
                        reg = <0x0>;
                        clocks = <&clockgen 1 0>;
+                       cpu-idle-states = <&CPU_PH20>;
                        #cooling-cells = <2>;
                };
 
@@ -74,6 +75,7 @@ cpu1: cpu@1 {
                        compatible = "arm,cortex-a53";
                        reg = <0x1>;
                        clocks = <&clockgen 1 0>;
+                       cpu-idle-states = <&CPU_PH20>;
                };
 
                cpu2: cpu@2 {
@@ -81,6 +83,7 @@ cpu2: cpu@2 {
                        compatible = "arm,cortex-a53";
                        reg = <0x2>;
                        clocks = <&clockgen 1 0>;
+                       cpu-idle-states = <&CPU_PH20>;
                };
 
                cpu3: cpu@3 {
@@ -88,6 +91,7 @@ cpu3: cpu@3 {
                        compatible = "arm,cortex-a53";
                        reg = <0x3>;
                        clocks = <&clockgen 1 0>;
+                       cpu-idle-states = <&CPU_PH20>;
                };
 
                cpu4: cpu@100 {
@@ -95,6 +99,7 @@ cpu4: cpu@100 {
                        compatible = "arm,cortex-a53";
                        reg = <0x100>;
                        clocks = <&clockgen 1 1>;
+                       cpu-idle-states = <&CPU_PH20>;
                        #cooling-cells = <2>;
                };
 
@@ -103,6 +108,7 @@ cpu5: cpu@101 {
                        compatible = "arm,cortex-a53";
                        reg = <0x101>;
                        clocks = <&clockgen 1 1>;
+                       cpu-idle-states = <&CPU_PH20>;
                };
 
                cpu6: cpu@102 {
@@ -110,6 +116,7 @@ cpu6: cpu@102 {
                        compatible = "arm,cortex-a53";
                        reg = <0x102>;
                        clocks = <&clockgen 1 1>;
+                       cpu-idle-states = <&CPU_PH20>;
                };
 
                cpu7: cpu@103 {
@@ -117,6 +124,16 @@ cpu7: cpu@103 {
                        compatible = "arm,cortex-a53";
                        reg = <0x103>;
                        clocks = <&clockgen 1 1>;
+                       cpu-idle-states = <&CPU_PH20>;
+               };
+
+               CPU_PH20: cpu-ph20 {
+                       compatible = "arm,idle-state";
+                       idle-state-name = "PH20";
+                       arm,psci-suspend-param = <0x00010000>;
+                       entry-latency-us = <1000>;
+                       exit-latency-us = <1000>;
+                       min-residency-us = <3000>;
                };
        };
 
@@ -140,6 +157,11 @@ timer {
                             <1 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */
        };
 
+       psci {
+               compatible = "arm,psci-0.2";
+               method = "smc";
+       };
+
        sysclk: sysclk {
                compatible = "fixed-clock";
                #clock-cells = <0>;