arm64: allwinner: a64: add NMI (R_INTC) controller on A64

Allwinner A64 SoC features a R_INTC controller, which controls the NMI
line, and this interrupt line is usually connected to the AXP PMIC.

Add support for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
[wens@csie.org: Add fallback sun6i-a31-r-intc compatible]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 9d00622ce8453820441e9c3c26980cab35c3dcd8..78c7c9d7d3cbc001bc830f81d0bef261dd84410b 100644 (file)
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -487,6 +487,15 @@ rtc: rtc@1f00000 {
                                     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
                };
 
+               r_intc: interrupt-controller@1f00c00 {
+                       compatible = "allwinner,sun50i-a64-r-intc",
+                                    "allwinner,sun6i-a31-r-intc";
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+                       reg = <0x01f00c00 0x400>;
+                       interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
                r_ccu: clock@1f01400 {
                        compatible = "allwinner,sun50i-a64-r-ccu";
                        reg = <0x01f01400 0x100>;