pinctrl: qcom: sdm845: Expose ufs_reset as gpio

The ufs_reset pin is expected to be wired to the reset pin of the
primary UFS memory but is pretty much just a general purpose output pinr

Reorder the pins and expose it as gpio 150, so that the UFS driver can
toggle it.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
index 321bdb9be0d23d6a13309d8d7c9e5dd712a0a0f1..7462e3743c68e3f9834cc55a5d2d16db1b1b3bb3 100644 (file)
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
@@ -79,7 +79,7 @@ to specify in a pin configuration subnode:
                      gpio0-gpio149
                        Supports mux, bias and drive-strength
 
-                     sdc2_clk, sdc2_cmd, sdc2_data
+                     sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset
                        Supports bias and drive-strength
 
 - function:

diff --git a/drivers/pinctrl/qcom/pinctrl-sdm845.c b/drivers/pinctrl/qcom/pinctrl-sdm845.c
index c97f20fca5fd315701da90b1b4bb8d7b8269c47a..e4e5acade086c6459898a11b6c43b6bc28f9629a 100644 (file)
--- a/drivers/pinctrl/qcom/pinctrl-sdm845.c
+++ b/drivers/pinctrl/qcom/pinctrl-sdm845.c
@@ -420,10 +420,10 @@ DECLARE_MSM_GPIO_PINS(147);
 DECLARE_MSM_GPIO_PINS(148);
 DECLARE_MSM_GPIO_PINS(149);
 
-static const unsigned int sdc2_clk_pins[] = { 150 };
-static const unsigned int sdc2_cmd_pins[] = { 151 };
-static const unsigned int sdc2_data_pins[] = { 152 };
-static const unsigned int ufs_reset_pins[] = { 153 };
+static const unsigned int ufs_reset_pins[] = { 150 };
+static const unsigned int sdc2_clk_pins[] = { 151 };
+static const unsigned int sdc2_cmd_pins[] = { 152 };
+static const unsigned int sdc2_data_pins[] = { 153 };
 
 enum sdm845_functions {
        msm_mux_gpio,
@@ -1271,10 +1271,10 @@ static const struct msm_pingroup sdm845_groups[] = {
        PINGROUP(147, NORTH, _, _, _, _, _, _, _, _, _, _),
        PINGROUP(148, NORTH, _, _, _, _, _, _, _, _, _, _),
        PINGROUP(149, NORTH, _, _, _, _, _, _, _, _, _, _),
+       UFS_RESET(ufs_reset, 0x99f000),
        SDC_QDSD_PINGROUP(sdc2_clk, 0x99a000, 14, 6),
        SDC_QDSD_PINGROUP(sdc2_cmd, 0x99a000, 11, 3),
        SDC_QDSD_PINGROUP(sdc2_data, 0x99a000, 9, 0),
-       UFS_RESET(ufs_reset, 0x99f000),
 };
 
 static const struct msm_pinctrl_soc_data sdm845_pinctrl = {
@@ -1284,7 +1284,7 @@ static const struct msm_pinctrl_soc_data sdm845_pinctrl = {
        .nfunctions = ARRAY_SIZE(sdm845_functions),
        .groups = sdm845_groups,
        .ngroups = ARRAY_SIZE(sdm845_groups),
-       .ngpios = 150,
+       .ngpios = 151,
 };
 
 static int sdm845_pinctrl_probe(struct platform_device *pdev)