]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15
authorGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 12 Jul 2018 16:08:57 +0000 (18:08 +0200)
committerSimon Horman <horms+renesas@verge.net.au>
Fri, 20 Jul 2018 11:44:10 +0000 (13:44 +0200)
R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
Cortex-A15 CPU cores, all of which have ARM architectured timers.

Force use of the ARM architectured timer on these SoCs.
This allows to:
  - Remove the calls to shmobile_init_delay() from the corresponding
    machine vectors,
  - Remove a check in timer setup specific to R-Car Gen2,
  - Remove a check in shmobile_init_delay().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/setup-r8a73a4.c
arch/arm/mach-shmobile/setup-rcar-gen2.c
arch/arm/mach-shmobile/timer.c

index 0b67254eabb2c4e823fb7f31aca437e1d45979f3..aeb2eed085988bb853685cc0174b192de0b4f054 100644 (file)
@@ -15,6 +15,7 @@ config ARCH_RCAR_GEN1
 
 config ARCH_RCAR_GEN2
        bool
+       select HAVE_ARM_ARCH_TIMER
        select PM
        select PM_GENERIC_DOMAINS
        select RENESAS_IRQC
@@ -58,6 +59,7 @@ config ARCH_R8A73A4
        bool "R-Mobile APE6 (R8A73A40)"
        select ARCH_RMOBILE
        select ARM_ERRATA_798181 if SMP
+       select HAVE_ARM_ARCH_TIMER
        select RENESAS_IRQC
 
 config ARCH_R8A7740
index ef391fa368e9ad00a69d32dc0fb7ca12bdec5950..23a29a0ea9c96c35fd0c3db3440aefebe0c02603 100644 (file)
@@ -18,7 +18,6 @@ static const char *const r8a73a4_boards_compat_dt[] __initconst = {
 };
 
 DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
-       .init_early     = shmobile_init_delay,
        .init_late      = shmobile_init_late,
        .dt_compat      = r8a73a4_boards_compat_dt,
 MACHINE_END
index 117531367f1779c6ce76c81890390269ddd68d09..013acc97795cbfc48bb99323a3936e1a9de46adc 100644 (file)
@@ -59,7 +59,6 @@ static unsigned int __init get_extal_freq(void)
 
 void __init rcar_gen2_timer_init(void)
 {
-#ifdef CONFIG_ARM_ARCH_TIMER
        void __iomem *base;
        u32 freq;
 
@@ -101,7 +100,6 @@ void __init rcar_gen2_timer_init(void)
        }
 
        iounmap(base);
-#endif /* CONFIG_ARM_ARCH_TIMER */
 
        of_clk_init(NULL);
        timer_probe();
@@ -187,7 +185,6 @@ static const char * const rcar_gen2_boards_compat_dt[] __initconst = {
 };
 
 DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)")
-       .init_early     = shmobile_init_delay,
        .init_late      = shmobile_init_late,
        .init_time      = rcar_gen2_timer_init,
        .reserve        = rcar_gen2_reserve,
@@ -202,7 +199,6 @@ static const char * const rz_g1_boards_compat_dt[] __initconst = {
 };
 
 DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)")
-       .init_early     = shmobile_init_delay,
        .init_late      = shmobile_init_late,
        .init_time      = rcar_gen2_timer_init,
        .reserve        = rcar_gen2_reserve,
index 6196a638038530481da95f6938bdf8198c56c880..828e8aea037e7d5e8ba1483d272756b389828a70 100644 (file)
@@ -32,14 +32,6 @@ void __init shmobile_init_delay(void)
        for_each_child_of_node(cpus, np) {
                u32 freq;
 
-               if (IS_ENABLED(CONFIG_ARM_ARCH_TIMER) &&
-                   (of_device_is_compatible(np, "arm,cortex-a7") ||
-                    of_device_is_compatible(np, "arm,cortex-a15"))) {
-                       of_node_put(np);
-                       of_node_put(cpus);
-                       return;
-               }
-
                if (!of_property_read_u32(np, "clock-frequency", &freq))
                        max_freq = max(max_freq, freq);
        }