]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: Improve omap l4per idling with wlcore edge sensitive interrupt
authorTony Lindgren <tony@atomide.com>
Tue, 3 Jul 2018 06:57:20 +0000 (23:57 -0700)
committerTony Lindgren <tony@atomide.com>
Tue, 3 Jul 2018 06:57:20 +0000 (23:57 -0700)
The wl1835mod.pdf data sheet says this pretty clearly for WL_IRQ line:

"WLAN SDIO out-of-band interrupt line. Set to rising edge (active high)
by default."

And it seems this interrupt can be optionally configured to use falling
edge too since commit bd763482c82e ("wl18xx: wlan_irq: support platform
dependent interrupt types").

On omap4, if the wlcore interrupt is configured as level instead of edge,
L4PER will stop doing hardware based idling after ifconfig wlan0 down is
done and the WL_EN line is pulled down.

The symptoms show up with L4PER status registers no longer showing the
IDLEST bits as 2 but as 0 for all the active GPIO banks and for
L4PER_CLKCTRL. Also the l4per_pwrdm RET count stops increasing in
the /sys/kernel/debug/pm_debug/count.

While there is also probably a GPIO related issue that needs to be
still fixed, this change gets us to the point where we can have L4PER
idling.

I'm guessing wlcore was at some point configured to use level interrupts
because of edge handling issues in gpio-omap. However, with the recent
fixes to gpio-omap the edge interrupts seem to be working just fine.

Let's change it for all omap boards with wlcore interrupt set as level.

Cc: Dave Gerlach <d-gerlach@ti.com>
Cc: Eyal Reizer <eyalr@ti.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Kalle Valo <kvalo@codeaurora.org>
Cc: Nishanth Menon <nm@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
[tony@atomide.com updated comments a bit for gpio issue]
Signed-off-by: Tony Lindgren <tony@atomide.com>
17 files changed:
arch/arm/boot/dts/am335x-baltos.dtsi
arch/arm/boot/dts/am335x-evm.dts
arch/arm/boot/dts/am335x-evmsk.dts
arch/arm/boot/dts/am437x-gp-evm.dts
arch/arm/boot/dts/logicpd-som-lv.dtsi
arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
arch/arm/boot/dts/omap3-cm-t3517.dts
arch/arm/boot/dts/omap3-cm-t3730.dts
arch/arm/boot/dts/omap3-evm-common.dtsi
arch/arm/boot/dts/omap3-igep0020-rev-f.dts
arch/arm/boot/dts/omap3-igep0030-rev-g.dts
arch/arm/boot/dts/omap3-zoom3.dts
arch/arm/boot/dts/omap4-droid4-xt894.dts
arch/arm/boot/dts/omap4-panda-common.dtsi
arch/arm/boot/dts/omap4-sdp.dts
arch/arm/boot/dts/omap4-var-som-om44-wlan.dtsi
arch/arm/boot/dts/omap5-board-common.dtsi

index ed7a5a3daa423cf6c935a2c25d56845949e0d9fd..8c6fc4161ad701d09e99612559a6b04a94ea6a83 100644 (file)
@@ -396,7 +396,7 @@ wlcore: wlcore@2 {
                compatible = "ti,wl1835";
                reg = <2>;
                interrupt-parent = <&gpio3>;
-               interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
+               interrupts = <7 IRQ_TYPE_EDGE_RISING>;
        };
 };
 
index 1356fd6f8da3f8d4b8643ab2686dc0c6181a4f52..c87d01297a013b60b8752594b13b89392ce95e7a 100644 (file)
@@ -778,7 +778,7 @@ wlcore: wlcore@0 {
                compatible = "ti,wl1835";
                reg = <2>;
                interrupt-parent = <&gpio3>;
-               interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
+               interrupts = <17 IRQ_TYPE_EDGE_RISING>;
        };
 };
 
index 0c096a795e3703651ec8127042610186a121f487..bf1a40e45c97b1b3a0cbbfa6ea583509f4e5bb8a 100644 (file)
@@ -690,7 +690,7 @@ wlcore: wlcore@2 {
                compatible = "ti,wl1271";
                reg = <2>;
                interrupt-parent = <&gpio0>;
-               interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; /* gpio 31 */
+               interrupts = <31 IRQ_TYPE_EDGE_RISING>; /* gpio 31 */
                ref-clock-frequency = <38400000>;
        };
 };
index 60414b1ca4044f38d71877d61cf0da8e34d54db9..5b97c20c5ed49c2de9432742442a322e4e127728 100644 (file)
@@ -790,7 +790,7 @@ wlcore: wlcore@0 {
                compatible = "ti,wl1835";
                reg = <2>;
                interrupt-parent = <&gpio1>;
-               interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
+               interrupts = <23 IRQ_TYPE_EDGE_RISING>;
        };
 };
 
index 3bb28c03ca74efb92caf73f06b01cd8428ba6828..ac343330d0c83f203526ba458f6ddad1a5357b0d 100644 (file)
@@ -142,7 +142,7 @@ wlcore: wlcore@2 {
                compatible = "ti,wl1273";
                reg = <2>;
                interrupt-parent = <&gpio1>;
-               interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; /* gpio 2 */
+               interrupts = <2 IRQ_TYPE_EDGE_RISING>; /* gpio 2 */
                ref-clock-frequency = <26000000>;
        };
 };
index 234afd6d60ec57f825744b8105549175ae90c0d0..9d5d53fbe9c0c0212684cae4738a461062a6ed3a 100644 (file)
@@ -48,7 +48,7 @@ wlcore: wlcore@2 {
                compatible = "ti,wl1283";
                reg = <2>;
                interrupt-parent = <&gpio5>;
-               interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
+               interrupts = <24 IRQ_TYPE_EDGE_RISING>; /* gpio 152 */
                ref-clock-frequency = <26000000>;
                tcxo-clock-frequency = <26000000>;
        };
index 4994e33bf663d7fcbf5de4c2e61a2911029cbab4..632f52efdf980b00f25f134c6a779ed4d8ed4c92 100644 (file)
@@ -141,7 +141,7 @@ wlcore: wlcore@2 {
                compatible = "ti,wl1271";
                reg = <2>;
                interrupt-parent = <&gpio5>;
-               interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; /* gpio 145 */
+               interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* gpio 145 */
                ref-clock-frequency = <38400000>;
        };
 };
index 8c63ac5bbb12297911324d5df0efb687c4ced6e6..6e944dfa0f3d13056e63bc75524b54d528c56379 100644 (file)
@@ -81,7 +81,7 @@ wlcore: wlcore@2 {
                compatible = "ti,wl1271";
                reg = <2>;
                interrupt-parent = <&gpio5>;
-               interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; /* gpio 136 */
+               interrupts = <8 IRQ_TYPE_EDGE_RISING>; /* gpio 136 */
                ref-clock-frequency = <38400000>;
        };
 };
index ee64191e41ca187b60eda4e36dc7aeb641c34896..4c1227d1e79b399d35bf98777e41be2a69010dc4 100644 (file)
@@ -133,7 +133,7 @@ wlcore: wlcore@2 {
                compatible = "ti,wl1271";
                reg = <2>;
                interrupt-parent = <&gpio5>;
-               interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; /* gpio 149 */
+               interrupts = <21 IRQ_TYPE_EDGE_RISING>; /* gpio 149 */
                ref-clock-frequency = <38400000>;
        };
 };
index 321c2b7a4e9fe1d067ce32d3fdf0409fdabffe91..285681d7af49d4cf4a865db730ece7af7335e321 100644 (file)
@@ -49,6 +49,6 @@ wlcore: wlcore@2 {
                compatible = "ti,wl1835";
                reg = <2>;
                interrupt-parent = <&gpio6>;
-               interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; /* gpio 177 */
+               interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* gpio 177 */
        };
 };
index 76dc08868bfb65b832c295ef06a4cf30f0a1566a..1adc73bd2ca0a028e3ca53e6f7f4faccfacc5250 100644 (file)
@@ -71,6 +71,6 @@ wlcore: wlcore@2 {
                compatible = "ti,wl1835";
                reg = <2>;
                interrupt-parent = <&gpio5>;
-               interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; /* gpio 136 */
+               interrupts = <8 IRQ_TYPE_EDGE_RISING>; /* gpio 136 */
        };
 };
index 96d0301a336a9b819828c9f0aef3cfe34d8bb5af..aac27a441331a3ff90b94bf69045fe944b337d34 100644 (file)
@@ -202,7 +202,7 @@ wlcore: wlcore@2 {
                compatible = "ti,wl1271";
                reg = <2>;
                interrupt-parent = <&gpio6>;
-               interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; /* gpio 162 */
+               interrupts = <2 IRQ_TYPE_EDGE_RISING>; /* gpio 162 */
                ref-clock-frequency = <26000000>;
        };
 };
index bdf73cbcec3a5c1df0bb55344049aafa3a3cc404..4f00559015a4f73a1e144bbef68ba19342fbb064 100644 (file)
@@ -372,7 +372,7 @@ wlcore: wlcore@2 {
                compatible = "ti,wl1285", "ti,wl1283";
                reg = <2>;
                interrupt-parent = <&gpio4>;
-               interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; /* gpio100 */
+               interrupts = <4 IRQ_TYPE_EDGE_RISING>; /* gpio100 */
                ref-clock-frequency = <26000000>;
                tcxo-clock-frequency = <26000000>;
        };
index 5501d1b4e6cdfa152804b7cbb5b277fcdc0417f6..563b47c5f0c7270d6051111c4ddab8ad6d4df0e5 100644 (file)
@@ -464,7 +464,7 @@ wlcore: wlcore@2 {
                compatible = "ti,wl1271";
                reg = <2>;
                interrupt-parent = <&gpio2>;
-               interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; /* gpio 53 */
+               interrupts = <21 IRQ_TYPE_EDGE_RISING>; /* gpio 53 */
                ref-clock-frequency = <38400000>;
        };
 };
index 280d92d42bf13b12983fca36e7786c13eadaa8cd..490726b522162bd0a11654291889e51d40793ee6 100644 (file)
@@ -493,7 +493,7 @@ wlcore: wlcore@2 {
                compatible = "ti,wl1281";
                reg = <2>;
                interrupt-parent = <&gpio1>;
-               interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; /* gpio 53 */
+               interrupts = <21 IRQ_TYPE_EDGE_RISING>; /* gpio 53 */
                ref-clock-frequency = <26000000>;
                tcxo-clock-frequency = <26000000>;
        };
index 1c5f6f35e1cf0bfcce3c077aea8919cc7a6bfc3c..878923473023372d8a6282c45217330fc3a2a874 100644 (file)
@@ -72,7 +72,7 @@ wlcore: wlcore@2 {
                compatible = "ti,wl1271";
                reg = <2>;
                interrupt-parent = <&gpio2>;
-               interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; /* gpio 41 */
+               interrupts = <9 IRQ_TYPE_EDGE_RISING>; /* gpio 41 */
                ref-clock-frequency = <38400000>;
        };
 };
index 3b2244560c28f584466b2bdf45b4c88ad5af330a..ab6f640b282bfc903f115bdb56796447b862b8f8 100644 (file)
@@ -364,7 +364,7 @@ wlcore: wlcore@2 {
                pinctrl-names = "default";
                pinctrl-0 = <&wlcore_irq_pin>;
                interrupt-parent = <&gpio1>;
-               interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;  /* gpio 14 */
+               interrupts = <14 IRQ_TYPE_EDGE_RISING>; /* gpio 14 */
                ref-clock-frequency = <26000000>;
        };
 };