drm/amd/pp: implement phm_reset_power_profile_state

mv related code out of force_dpm_level to
phm_reset_power_profile_state

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
index 623cff90233d450f60a7021b260edc7a7d63a911..2b0c53fe4c8dfb47a5b6353b0c0fd5fbf9dba753 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
@@ -112,26 +112,29 @@ int phm_force_dpm_levels(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level
 
        PHM_FUNC_CHECK(hwmgr);
 
-       if (hwmgr->hwmgr_func->force_dpm_level != NULL) {
+       if (hwmgr->hwmgr_func->force_dpm_level != NULL)
                ret = hwmgr->hwmgr_func->force_dpm_level(hwmgr, level);
-               if (ret)
-                       return ret;
-
-               if (hwmgr->hwmgr_func->set_power_profile_state) {
-                       if (hwmgr->current_power_profile == AMD_PP_GFX_PROFILE)
-                               ret = hwmgr->hwmgr_func->set_power_profile_state(
-                                               hwmgr,
-                                               &hwmgr->gfx_power_profile);
-                       else if (hwmgr->current_power_profile == AMD_PP_COMPUTE_PROFILE)
-                               ret = hwmgr->hwmgr_func->set_power_profile_state(
-                                               hwmgr,
-                                               &hwmgr->compute_power_profile);
-               }
-       }
 
        return ret;
 }
 
+int phm_reset_power_profile_state(struct pp_hwmgr *hwmgr)
+{
+       int ret = 0;
+
+       if (hwmgr->hwmgr_func->set_power_profile_state) {
+               if (hwmgr->current_power_profile == AMD_PP_GFX_PROFILE)
+                       ret = hwmgr->hwmgr_func->set_power_profile_state(
+                                       hwmgr,
+                                       &hwmgr->gfx_power_profile);
+               else if (hwmgr->current_power_profile == AMD_PP_COMPUTE_PROFILE)
+                       ret = hwmgr->hwmgr_func->set_power_profile_state(
+                                       hwmgr,
+                                       &hwmgr->compute_power_profile);
+       }
+       return ret;
+}
+
 int phm_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
                                   struct pp_power_state *adjusted_ps,
                             const struct pp_power_state *current_ps)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/pp_psm.c b/drivers/gpu/drm/amd/powerplay/hwmgr/pp_psm.c
index ab852b2cdf54814b7dc627d00c797d9924c44157..f9ff40928ea9ecf9c37290e3863737ab6acc4d65 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/pp_psm.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/pp_psm.c
@@ -245,6 +245,7 @@ int psm_adjust_power_state_dynamic(struct pp_hwmgr *hwmgr, bool skip,
 
        phm_notify_smc_display_config_after_ps_adjustment(hwmgr);
        phm_force_dpm_levels(hwmgr, hwmgr->dpm_level);
+       phm_reset_power_profile_state(hwmgr);
        return 0;
 }
 

diff --git a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
index 57a0467b72676c9a3a06bb79db285ec5f063700f..5716b937a6ad41e616b321762d4ebf990b3b91e9 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
@@ -437,5 +437,6 @@ extern int phm_display_clock_voltage_request(struct pp_hwmgr *hwmgr,
 
 extern int phm_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks);
 extern int phm_disable_smc_firmware_ctf(struct pp_hwmgr *hwmgr);
+extern int phm_reset_power_profile_state(struct pp_hwmgr *hwmgr);
 #endif /* _HARDWARE_MANAGER_H_ */