clk: ti: move OMAP4+ DPLL implementation under drivers/clk

With the legacy clock support gone, the OMAP4 specific DPLL implementations
can be moved under the clock driver. Change some of the function prototypes
to be static at the same time, and remove some exports from the global TI
clock driver header.

Signed-off-by: Tero Kristo <t-kristo@ti.com>

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index fcb5d47f88ca85cb125270c70127fa11367173d3..5bcd282f04b3262d3e59e9933ccfc67e2b8e6eba 100644 (file)
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -193,12 +193,12 @@ obj-$(CONFIG_ARCH_OMAP3)          += clock3517.o clock36xx.o
 obj-$(CONFIG_ARCH_OMAP3)               += dpll3xxx.o
 obj-$(CONFIG_ARCH_OMAP3)               += clkt_iclk.o
 obj-$(CONFIG_ARCH_OMAP4)               += $(clock-common)
-obj-$(CONFIG_ARCH_OMAP4)               += dpll3xxx.o dpll44xx.o
+obj-$(CONFIG_ARCH_OMAP4)               += dpll3xxx.o
 obj-$(CONFIG_SOC_AM33XX)               += $(clock-common) dpll3xxx.o
 obj-$(CONFIG_SOC_OMAP5)                        += $(clock-common)
-obj-$(CONFIG_SOC_OMAP5)                        += dpll3xxx.o dpll44xx.o
+obj-$(CONFIG_SOC_OMAP5)                        += dpll3xxx.o
 obj-$(CONFIG_SOC_DRA7XX)               += $(clock-common)
-obj-$(CONFIG_SOC_DRA7XX)               += dpll3xxx.o dpll44xx.o
+obj-$(CONFIG_SOC_DRA7XX)               += dpll3xxx.o
 obj-$(CONFIG_SOC_AM43XX)               += $(clock-common) dpll3xxx.o
 
 # OMAP2 clock rate set data (old "OPP" data)

diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index ac21856d245df1df4dab9301cbd5f580b94a6e41..d7ed2446057cc0d286c7ad8ca6c1b3e7be2cf024 100644 (file)
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -183,8 +183,6 @@ struct clksel {
 u32 omap3_dpll_autoidle_read(struct clk_hw_omap *clk);
 void omap3_dpll_allow_idle(struct clk_hw_omap *clk);
 void omap3_dpll_deny_idle(struct clk_hw_omap *clk);
-void omap4_dpllmx_allow_gatectrl(struct clk_hw_omap *clk);
-void omap4_dpllmx_deny_gatectrl(struct clk_hw_omap *clk);
 
 void __init omap2_clk_disable_clkdm_control(void);
 
@@ -204,8 +202,6 @@ int omap2_clksel_set_parent(struct clk_hw *hw, u8 field_val);
 extern void omap2_clkt_iclk_allow_idle(struct clk_hw_omap *clk);
 extern void omap2_clkt_iclk_deny_idle(struct clk_hw_omap *clk);
 
-unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk);
-
 void omap2_clk_dflt_find_companion(struct clk_hw_omap *clk,
                                   void __iomem **other_reg,
                                   u8 *other_bit);

diff --git a/drivers/clk/ti/Makefile b/drivers/clk/ti/Makefile
index 62dae2ad3c69acf88e373636b79792c31a973cdd..c3ec3014fb2d80269c7e9b495aefcd66c503bde5 100644 (file)
--- a/drivers/clk/ti/Makefile
+++ b/drivers/clk/ti/Makefile
@@ -7,10 +7,10 @@ obj-$(CONFIG_SOC_TI81XX)              += $(clk-common) fapll.o clk-816x.o
 obj-$(CONFIG_ARCH_OMAP2)               += $(clk-common) interface.o clk-2xxx.o
 obj-$(CONFIG_ARCH_OMAP3)               += $(clk-common) interface.o \
                                           clk-3xxx.o
-obj-$(CONFIG_ARCH_OMAP4)               += $(clk-common) clk-44xx.o
-obj-$(CONFIG_SOC_OMAP5)                        += $(clk-common) clk-54xx.o
+obj-$(CONFIG_ARCH_OMAP4)               += $(clk-common) clk-44xx.o dpll44xx.o
+obj-$(CONFIG_SOC_OMAP5)                        += $(clk-common) clk-54xx.o dpll44xx.o
 obj-$(CONFIG_SOC_DRA7XX)               += $(clk-common) clk-7xx.o \
-                                          clk-dra7-atl.o
+                                          clk-dra7-atl.o dpll44xx.o
 obj-$(CONFIG_SOC_AM43XX)               += $(clk-common) clk-43xx.o
 
 ifdef CONFIG_ATAGS

diff --git a/drivers/clk/ti/clock.h b/drivers/clk/ti/clock.h
index 05ed10a81ace349f31dbb6d43b63f88f2e6c3695..c75d4b44cbef4fa8a05ecd80683f8de4b45a9238 100644 (file)
--- a/drivers/clk/ti/clock.h
+++ b/drivers/clk/ti/clock.h
@@ -169,6 +169,20 @@ void ti_clk_patch_legacy_clks(struct ti_clk **patch);
 struct clk *ti_clk_register_clk(struct ti_clk *setup);
 int ti_clk_register_legacy_clks(struct ti_clk_alias *clks);
 
+extern const struct clk_hw_omap_ops clkhwops_omap4_dpllmx;
+
 u8 omap2_init_dpll_parent(struct clk_hw *hw);
 
+unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw,
+                                        unsigned long parent_rate);
+long omap4_dpll_regm4xen_round_rate(struct clk_hw *hw,
+                                   unsigned long target_rate,
+                                   unsigned long *parent_rate);
+long omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw,
+                                       unsigned long rate,
+                                       unsigned long min_rate,
+                                       unsigned long max_rate,
+                                       unsigned long *best_parent_rate,
+                                       struct clk_hw **best_parent_clk);
+
 #endif

diff --git a/arch/arm/mach-omap2/dpll44xx.c b/drivers/clk/ti/dpll44xx.c
similarity index 91%
rename from arch/arm/mach-omap2/dpll44xx.c
rename to drivers/clk/ti/dpll44xx.c
index f231be05b9a638de8e52cfe03d78765433815764..ef1a5b43d01ffd06c2c4da336f32f7ef8e3a7f0d 100644 (file)
--- a/arch/arm/mach-omap2/dpll44xx.c
+++ b/drivers/clk/ti/dpll44xx.c
@@ -14,6 +14,7 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 #include <linux/bitops.h>
+#include <linux/clk/ti.h>
 
 #include "clock.h"
 
@@ -29,14 +30,14 @@
 /*
  * Bitfield declarations
  */
-#define OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK            (1 << 8)
-#define OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK          (1 << 10)
-#define OMAP4430_DPLL_REGM4XEN_MASK                    (1 << 11)
+#define OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK            BIT(8)
+#define OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK          BIT(10)
+#define OMAP4430_DPLL_REGM4XEN_MASK                    BIT(11)
 
 /* Static rate multiplier for OMAP4 REGM4XEN clocks */
 #define OMAP4430_REGM4XEN_MULT                         4
 
-void omap4_dpllmx_allow_gatectrl(struct clk_hw_omap *clk)
+static void omap4_dpllmx_allow_gatectrl(struct clk_hw_omap *clk)
 {
        u32 v;
        u32 mask;
@@ -48,13 +49,13 @@ void omap4_dpllmx_allow_gatectrl(struct clk_hw_omap *clk)
                        OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK :
                        OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK;
 
-       v = omap2_clk_readl(clk, clk->clksel_reg);
+       v = ti_clk_ll_ops->clk_readl(clk->clksel_reg);
        /* Clear the bit to allow gatectrl */
        v &= ~mask;
-       omap2_clk_writel(v, clk, clk->clksel_reg);
+       ti_clk_ll_ops->clk_writel(v, clk->clksel_reg);
 }
 
-void omap4_dpllmx_deny_gatectrl(struct clk_hw_omap *clk)
+static void omap4_dpllmx_deny_gatectrl(struct clk_hw_omap *clk)
 {
        u32 v;
        u32 mask;
@@ -66,10 +67,10 @@ void omap4_dpllmx_deny_gatectrl(struct clk_hw_omap *clk)
                        OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK :
                        OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK;
 
-       v = omap2_clk_readl(clk, clk->clksel_reg);
+       v = ti_clk_ll_ops->clk_readl(clk->clksel_reg);
        /* Set the bit to deny gatectrl */
        v |= mask;
-       omap2_clk_writel(v, clk, clk->clksel_reg);
+       ti_clk_ll_ops->clk_writel(v, clk->clksel_reg);
 }
 
 const struct clk_hw_omap_ops clkhwops_omap4_dpllmx = {
@@ -112,7 +113,7 @@ static void omap4_dpll_lpmode_recalc(struct dpll_data *dd)
  * upon success, or 0 upon error.
  */
 unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw,
-                       unsigned long parent_rate)
+                                        unsigned long parent_rate)
 {
        struct clk_hw_omap *clk = to_clk_hw_omap(hw);
        u32 v;
@@ -127,7 +128,7 @@ unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw,
        rate = omap2_get_dpll_rate(clk);
 
        /* regm4xen adds a multiplier of 4 to DPLL calculations */
-       v = omap2_clk_readl(clk, dd->control_reg);
+       v = ti_clk_ll_ops->clk_readl(dd->control_reg);
        if (v & OMAP4430_DPLL_REGM4XEN_MASK)
                rate *= OMAP4430_REGM4XEN_MULT;
 

diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
index 886b2e9d22045e24f3e76b63d3366b674653831d..ee59e076340f26c0ddff5f47657267ddfa37486b 100644 (file)
--- a/include/linux/clk/ti.h
+++ b/include/linux/clk/ti.h
@@ -275,17 +275,6 @@ long omap3_noncore_dpll_determine_rate(struct clk_hw *hw,
                                       unsigned long max_rate,
                                       unsigned long *best_parent_rate,
                                       struct clk_hw **best_parent_clk);
-unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw,
-                                        unsigned long parent_rate);
-long omap4_dpll_regm4xen_round_rate(struct clk_hw *hw,
-                                   unsigned long target_rate,
-                                   unsigned long *parent_rate);
-long omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw,
-                                       unsigned long rate,
-                                       unsigned long min_rate,
-                                       unsigned long max_rate,
-                                       unsigned long *best_parent_rate,
-                                       struct clk_hw **best_parent_clk);
 unsigned long omap3_dpll_recalc(struct clk_hw *hw, unsigned long parent_rate);
 long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate,
                           unsigned long *parent_rate);
@@ -314,6 +303,7 @@ int omap2_reprogram_dpllcore(struct clk_hw *clk, unsigned long rate,
                             unsigned long parent_rate);
 void omap2xxx_clkt_dpllcore_init(struct clk_hw *hw);
 void omap2xxx_clkt_vps_init(void);
+unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk);
 
 void __iomem *ti_clk_get_reg_addr(struct device_node *node, int index);
 void ti_dt_clocks_register(struct ti_dt_clk *oclks);
@@ -364,7 +354,6 @@ static inline void of_ti_clk_deny_autoidle_all(void) { }
 extern const struct clk_hw_omap_ops clkhwops_omap2xxx_dpll;
 extern const struct clk_hw_omap_ops clkhwops_omap2430_i2chs_wait;
 extern const struct clk_hw_omap_ops clkhwops_omap3_dpll;
-extern const struct clk_hw_omap_ops clkhwops_omap4_dpllmx;
 extern const struct clk_hw_omap_ops clkhwops_wait;
 extern const struct clk_hw_omap_ops clkhwops_omap3430es2_dss_usbhost_wait;
 extern const struct clk_hw_omap_ops clkhwops_am35xx_ipss_module_wait;