]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/amdgpu/psp: update topology info structures
authorHawking Zhang <Hawking.Zhang@amd.com>
Sat, 29 Sep 2018 13:52:50 +0000 (21:52 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 6 Nov 2018 19:02:45 +0000 (14:02 -0500)
topology info structure needs to match with the one defined
in xgmi ta

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c

index 28700a80cddd1869f4c105d161edc0cf0d109796..9ec5d1a666a6dbe082aa7ba46394fa9a5704f28e 100644 (file)
@@ -37,6 +37,7 @@
 #define PSP_TMR_SIZE   0x400000
 
 struct psp_context;
+struct psp_xgmi_node_info;
 struct psp_xgmi_topology_info;
 
 enum psp_ring_type
@@ -85,9 +86,9 @@ struct psp_funcs
        uint64_t (*xgmi_get_node_id)(struct psp_context *psp);
        uint64_t (*xgmi_get_hive_id)(struct psp_context *psp);
        int (*xgmi_get_topology_info)(struct psp_context *psp, int number_devices,
-                       struct psp_xgmi_topology_info *topology);
+                                     struct psp_xgmi_topology_info *topology);
        int (*xgmi_set_topology_info)(struct psp_context *psp, int number_devices,
-                       struct psp_xgmi_topology_info *topology);
+                                     struct psp_xgmi_topology_info *topology);
 };
 
 struct psp_xgmi_context {
@@ -161,21 +162,17 @@ struct amdgpu_psp_funcs {
                                        enum AMDGPU_UCODE_ID);
 };
 
+#define AMDGPU_XGMI_MAX_CONNECTED_NODES                64
+struct psp_xgmi_node_info {
+       uint64_t                                node_id;
+       uint8_t                                 num_hops;
+       uint8_t                                 is_sharing_enabled;
+       enum ta_xgmi_assigned_sdma_engine       sdma_engine;
+};
+
 struct psp_xgmi_topology_info {
-       /* Generated by PSP to identify the GPU instance within xgmi connection */
-       uint64_t                        node_id;
-       /*
-        * If all bits set to 0 , driver indicates it wants to retrieve the xgmi
-        * connection vector topology, but not access enable the connections
-        * if some or all bits are set to 1, driver indicates it want to retrieve the
-        * current xgmi topology and  access enable the link to GPU[i] associated
-        * with the bit position in the  vector.
-        * On return,: bits indicated which xgmi links are present/active depending
-        * on the  value passed in. The relative bit offset for the  relative GPU index
-        * within the  hive is always marked active.
-        */
-       uint32_t                        connection_mask;
-       uint32_t                        reserved; /* must be  0 */
+       uint32_t                        num_nodes;
+       struct psp_xgmi_node_info       nodes[AMDGPU_XGMI_MAX_CONNECTED_NODES];
 };
 
 #define psp_prep_cmd_buf(ucode, type) (psp)->funcs->prep_cmd_buf((ucode), (type))
index 32896ba12c670a14a5be1f2173d558c7423740c1..e92b4548db49b60e2fe981d3eebc9cb803354bb1 100644 (file)
@@ -63,7 +63,7 @@ static struct amdgpu_hive_info *amdgpu_get_xgmi_hive(struct amdgpu_device *adev)
 
 int amdgpu_xgmi_add_device(struct amdgpu_device *adev)
 {
-       struct psp_xgmi_topology_info tmp_topology[AMDGPU_MAX_XGMI_DEVICE_PER_HIVE];
+       struct psp_xgmi_topology_info tmp_topology;
        struct amdgpu_hive_info *hive;
        struct amdgpu_xgmi      *entry;
        struct amdgpu_device    *tmp_adev;
@@ -76,7 +76,7 @@ int amdgpu_xgmi_add_device(struct amdgpu_device *adev)
        adev->gmc.xgmi.node_id = psp_xgmi_get_node_id(&adev->psp);
        adev->gmc.xgmi.hive_id = psp_xgmi_get_hive_id(&adev->psp);
 
-       memset(&tmp_topology[0], 0, sizeof(tmp_topology));
+       memset(&tmp_topology, 0, sizeof(tmp_topology));
        mutex_lock(&xgmi_mutex);
        hive = amdgpu_get_xgmi_hive(adev);
        if (!hive)
@@ -84,9 +84,9 @@ int amdgpu_xgmi_add_device(struct amdgpu_device *adev)
 
        list_add_tail(&adev->gmc.xgmi.head, &hive->device_list);
        list_for_each_entry(entry, &hive->device_list, head)
-               tmp_topology[count++].node_id = entry->node_id;
+               tmp_topology.nodes[count++].node_id = entry->node_id;
 
-       ret = psp_xgmi_get_topology_info(&adev->psp, count, tmp_topology);
+       ret = psp_xgmi_get_topology_info(&adev->psp, count, &tmp_topology);
        if (ret) {
                dev_err(adev->dev,
                        "XGMI: Get topology failure on device %llx, hive %llx, ret %d",
@@ -96,7 +96,7 @@ int amdgpu_xgmi_add_device(struct amdgpu_device *adev)
        }
        /* Each psp need to set the latest topology */
        list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) {
-               ret = psp_xgmi_set_topology_info(&tmp_adev->psp, count, tmp_topology);
+               ret = psp_xgmi_set_topology_info(&tmp_adev->psp, count, &tmp_topology);
                if (ret) {
                        dev_err(tmp_adev->dev,
                                "XGMI: Set topology failure on device %llx, hive %llx, ret %d",
@@ -115,5 +115,3 @@ int amdgpu_xgmi_add_device(struct amdgpu_device *adev)
        mutex_unlock(&xgmi_mutex);
        return ret;
 }
-
-