]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
clk: samsung: dt-bindings: Document Exynos5433 IMEM CMU
authorKamil Konieczny <k.konieczny@partner.samsung.com>
Tue, 22 Jan 2019 09:02:30 +0000 (10:02 +0100)
committerSylwester Nawrocki <s.nawrocki@samsung.com>
Fri, 1 Feb 2019 13:36:47 +0000 (14:36 +0100)
Document DT bindings of the IMEM CMU providing clocks for the Exynos5433
Security SubSystem (SSS) and SlimSSS IPs.

Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com>
[s.nawrocki@samsung.com: edited commit description]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Documentation/devicetree/bindings/clock/exynos5433-clock.txt

index 50d5897c9849134cd9ebc30f5780de05ab5190e2..183c327a7d6bddc05862bddb060a7e36c2b3938b 100644 (file)
@@ -50,6 +50,8 @@ Required Properties:
     IPs.
   - "samsung,exynos5433-cmu-cam1" - clock controller compatible for CMU_CAM1
     which generates clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs.
+  - "samsung,exynos5433-cmu-imem"   - clock controller compatible for CMU_IMEM
+    which generates clocks for SSS (Security SubSystem) and SlimSSS IPs.
 
 - reg: physical base address of the controller and length of memory mapped
   region.
@@ -168,6 +170,12 @@ Required Properties:
                - aclk_cam1_400
                - aclk_cam1_552
 
+       Input clocks for imem clock controller:
+               - oscclk
+               - aclk_imem_sssx_266
+               - aclk_imem_266
+               - aclk_imem_200
+
 Optional properties:
   - power-domains: a phandle to respective power domain node as described by
        generic PM domain bindings (see power/power_domain.txt for more
@@ -469,6 +477,21 @@ Example 2: Examples of clock controller nodes are listed below.
                power-domains = <&pd_cam1>;
        };
 
+       cmu_imem: clock-controller@11060000 {
+               compatible = "samsung,exynos5433-cmu-imem";
+               reg = <0x11060000 0x1000>;
+               #clock-cells = <1>;
+
+               clock-names = "oscclk",
+                       "aclk_imem_sssx_266",
+                       "aclk_imem_266",
+                       "aclk_imem_200";
+               clocks = <&xxti>,
+                       <&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>,
+                       <&cmu_top CLK_DIV_ACLK_IMEM_266>,
+                       <&cmu_top CLK_DIV_ACLK_IMEM_200>;
+       };
+
 Example 3: UART controller node that consumes the clock generated by the clock
           controller.