]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
spi/xilinx: Use cached value of register
authorRicardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Wed, 28 Jan 2015 12:23:43 +0000 (13:23 +0100)
committerMark Brown <broonie@kernel.org>
Wed, 28 Jan 2015 19:42:42 +0000 (19:42 +0000)
The control register has not changed since the previous access.
Therefore we can use the cached value and safe one bus access.

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-xilinx.c

index a0f7c9d4a349c2607c6d72b5f04601a5b44576d1..12b311ed9bfaab9e1a8ab3083d3bab82c2c34772 100644 (file)
@@ -271,7 +271,6 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
                 * transmitter while the Isr refills the transmit register/FIFO,
                 * or make sure it is stopped if we're done.
                 */
-               cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET);
                xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT,
                               xspi->regs + XSPI_CR_OFFSET);