]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: BCM5301X: Set 5 GHz wireless frequency limits on Netgear R8000
authorRafał Miłecki <rafal@milecki.pl>
Fri, 13 Jan 2017 23:58:57 +0000 (00:58 +0100)
committerFlorian Fainelli <f.fainelli@gmail.com>
Thu, 19 Jan 2017 01:18:27 +0000 (17:18 -0800)
Netgear R8000 is a tri-band home router. It has three BCM43602 chipsets
two of them for 5 GHz band. Both seem the same and their firmwares
report the same set of channels. The problem is due to hardware / board
design there are extra limitations that should be respected.

First PHY should be used for U-NII-2 and U-NII-3. Third PHY should be
used for U-NII-1. Using them in a different way may result in wireless
not working or in noticeably reduced performance. Basic version of this
info was provided by Broadcom employee, then it has been verified by me
using original vendor firmware (which has limitations hardcoded in UI).

This patch uses recently introduced ieee80211-freq-limit property to
describe these limitations at DT level.

Referencing PCIe devices in DT required specifying all related bridges.
Below you can see (a bit complex) PCI tree from R8000 that explains all
entries that I needed to put in DT.

0000:00:00.0 14e4:8012 Bridge Device
└─ 0000:01:00.0 14e4:aa52 Network Controller

0001:00:00.0 14e4:8012 Bridge Device
└─ 0001:01:00.0 10b5:8603 Bridge Device
   ├─ 0001:02:01.0 10b5:8603 Bridge Device
   │  └─ 0001:03:00.0 14e4:aa52 Network Controller
   ├─ 0001:02:02.0 10b5:8603 Bridge Device
   │  └─ 0001:04:00.0 14e4:aa52 Network Controller
   ├─ 0001:02:03.0 000d:0000 0x000000
   ├─ 0001:02:04.0 000d:0000 0x000000
   ├─ 0001:02:05.0 000d:0000 0x000000
   ├─ 0001:02:06.0 000d:0000 0x000000
   ├─ (...)
   ├─ 0001:02:1d.0 000d:0000 0x000000
   ├─ 0001:02:1e.0 000d:0000 0x000000
   └─ 0001:02:1f.0 000d:0000 0x000000

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
arch/arm/boot/dts/bcm4709-netgear-r8000.dts
arch/arm/boot/dts/bcm5301x.dtsi

index cd13534708f3d6e41817c447ec789695c1e15609..8e39a84e5bf9eb23ca0f0fc0efd9cfd5f5ba410e 100644 (file)
@@ -108,6 +108,54 @@ restart {
        };
 };
 
+&pcie0 {
+       #address-cells = <3>;
+       #size-cells = <2>;
+
+       bridge@0,0,0 {
+               reg = <0x0000 0 0 0 0>;
+
+               #address-cells = <3>;
+               #size-cells = <2>;
+
+               wifi@0,1,0 {
+                       reg = <0x0000 0 0 0 0>;
+                       ieee80211-freq-limit = <5735000 5835000>;
+               };
+       };
+};
+
+&pcie1 {
+       #address-cells = <3>;
+       #size-cells = <2>;
+
+       bridge@1,0,0 {
+               reg = <0x0000 0 0 0 0>;
+
+               #address-cells = <3>;
+               #size-cells = <2>;
+
+               bridge@1,1,0 {
+                       reg = <0x0000 0 0 0 0>;
+
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+
+                       bridge@1,2,2 {
+                               reg = <0x1000 0 0 0 0>;
+
+                               #address-cells = <3>;
+                               #size-cells = <2>;
+
+                               wifi@1,4,0 {
+                                       reg = <0x0000 0 0 0 0>;
+                                       ieee80211-freq-limit = <5170000 5730000>;
+                               };
+                       };
+               };
+       };
+};
+
 &usb2 {
        vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>;
 };
index a4614c9327fbb4143da50dd1b10af1eef03042bc..4fbb089cf5ad3c1f96a15f504ee433ff06b724df 100644 (file)
@@ -243,6 +243,14 @@ chipcommon: chipcommon@0 {
                        #gpio-cells = <2>;
                };
 
+               pcie0: pcie@12000 {
+                       reg = <0x00012000 0x1000>;
+               };
+
+               pcie1: pcie@13000 {
+                       reg = <0x00013000 0x1000>;
+               };
+
                usb2: usb2@21000 {
                        reg = <0x00021000 0x1000>;