arm64: tegra: Add ACONNECT, ADMA and AGIC nodes

Add device tree nodes for the ACONNECT, ADMA and AGIC devices on
Tegra186 and Tegra194.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index d4d02f0438359bc83e17501634161cebdc72e8ff..47cd831fcf4456f3537f84eeee0490917eca514c 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -70,6 +70,75 @@ ethernet@2490000 {
                snps,rxpbl = <8>;
        };
 
+       aconnect {
+               compatible = "nvidia,tegra186-aconnect",
+                            "nvidia,tegra210-aconnect";
+               clocks = <&bpmp TEGRA186_CLK_APE>,
+                        <&bpmp TEGRA186_CLK_APB2APE>;
+               clock-names = "ape", "apb2ape";
+               power-domains = <&bpmp TEGRA186_POWER_DOMAIN_AUD>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0x02900000 0x0 0x02900000 0x200000>;
+               status = "disabled";
+
+               dma-controller@2930000 {
+                       compatible = "nvidia,tegra186-adma";
+                       reg = <0x02930000 0x20000>;
+                       interrupt-parent = <&agic>;
+                       interrupts =  <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+                       #dma-cells = <1>;
+                       clocks = <&bpmp TEGRA186_CLK_AHUB>;
+                       clock-names = "d_audio";
+                       status = "disabled";
+               };
+
+               agic: interrupt-controller@2a40000 {
+                       compatible = "nvidia,tegra186-agic",
+                                    "nvidia,tegra210-agic";
+                       #interrupt-cells = <3>;
+                       interrupt-controller;
+                       reg = <0x02a41000 0x1000>,
+                             <0x02a42000 0x2000>;
+                       interrupts = <GIC_SPI 145
+                               (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+                       clocks = <&bpmp TEGRA186_CLK_APE>;
+                       clock-names = "clk";
+                       status = "disabled";
+               };
+       };
+
        memory-controller@2c00000 {
                compatible = "nvidia,tegra186-mc";
                reg = <0x0 0x02c00000 0x0 0xb0000>;

diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index a2528312db5f3235fe3b2e451b8f23c503a59803..1761b3d545f0ebcf678f1d0cb089c026c743da0b 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -59,6 +59,77 @@ ethernet@2490000 {
                        snps,rxpbl = <8>;
                };
 
+               aconnect {
+                       compatible = "nvidia,tegra194-aconnect",
+                                    "nvidia,tegra210-aconnect";
+                       clocks = <&bpmp TEGRA194_CLK_APE>,
+                                <&bpmp TEGRA194_CLK_APB2APE>;
+                       clock-names = "ape", "apb2ape";
+                       power-domains = <&bpmp TEGRA194_POWER_DOMAIN_AUD>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x02900000 0x02900000 0x200000>;
+                       status = "disabled";
+
+                       dma-controller@2930000 {
+                               compatible = "nvidia,tegra194-adma",
+                                            "nvidia,tegra186-adma";
+                               reg = <0x02930000 0x20000>;
+                               interrupt-parent = <&agic>;
+                               interrupts =  <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+                                             <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+                               #dma-cells = <1>;
+                               clocks = <&bpmp TEGRA194_CLK_AHUB>;
+                               clock-names = "d_audio";
+                               status = "disabled";
+                       };
+
+                       agic: interrupt-controller@2a40000 {
+                               compatible = "nvidia,tegra194-agic",
+                                            "nvidia,tegra210-agic";
+                               #interrupt-cells = <3>;
+                               interrupt-controller;
+                               reg = <0x02a41000 0x1000>,
+                                     <0x02a42000 0x2000>;
+                               interrupts = <GIC_SPI 145
+                                             (GIC_CPU_MASK_SIMPLE(4) |
+                                              IRQ_TYPE_LEVEL_HIGH)>;
+                               clocks = <&bpmp TEGRA194_CLK_APE>;
+                               clock-names = "clk";
+                               status = "disabled";
+                       };
+               };
+
                uarta: serial@3100000 {
                        compatible = "nvidia,tegra194-uart", "nvidia,tegra20-uart";
                        reg = <0x03100000 0x40>;