ARC: [plat-hsdk]: Enable AXI DW DMAC support

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

diff --git a/arch/arc/boot/dts/hsdk.dts b/arch/arc/boot/dts/hsdk.dts
index b62088bf03a83ace9fc8b871c5865b7314ef9392..69bc1c9e8e50d673729a6187fb4f1669971c9cb7 100644 (file)
--- a/arch/arc/boot/dts/hsdk.dts
+++ b/arch/arc/boot/dts/hsdk.dts
@@ -167,6 +167,18 @@ mmcclk_biu: mmcclk-biu {
                        #clock-cells = <0>;
                };
 
+               dmac_core_clk: dmac-core-clk {
+                       compatible = "fixed-clock";
+                       clock-frequency = <400000000>;
+                       #clock-cells = <0>;
+               };
+
+               dmac_cfg_clk: dmac-gpu-cfg-clk {
+                       compatible = "fixed-clock";
+                       clock-frequency = <200000000>;
+                       #clock-cells = <0>;
+               };
+
                gmac: ethernet@8000 {
                        #interrupt-cells = <1>;
                        compatible = "snps,dwmac";
@@ -239,6 +251,21 @@ gpio_port_a: gpio-controller@0 {
                                reg = <0>;
                        };
                };
+
+               dmac: dmac@80000 {
+                       compatible = "snps,axi-dma-1.01a";
+                       reg = <0x80000 0x400>;
+                       interrupts = <27>;
+                       clocks = <&dmac_core_clk>, <&dmac_cfg_clk>;
+                       clock-names = "core-clk", "cfgr-clk";
+
+                       dma-channels = <4>;
+                       snps,dma-masters = <2>;
+                       snps,data-width = <3>;
+                       snps,block-size = <4096 4096 4096 4096>;
+                       snps,priority = <0 1 2 3>;
+                       snps,axi-max-burst-len = <16>;
+               };
        };
 
        memory@80000000 {